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7950e1b9f4
Specification: - SoC: MediaTek MT7620A - Flash: 8 MB - RAM: 64 MB - Ethernet: 4 FE ports and 1 GE port (RTL8211F on port 5) - Wireless radio: MT7620 for 2.4G and MT7612E for 5G, both equipped with external PA. - UART: 1 x UART on PCB - 57600 8N1 Flash instruction: The U-boot is based on Ralink SDK so we can flash the firmware using UART: 1. Configure PC with a static IP address and setup an TFTP server. 2. Put the firmware into the tftp directory. 3. Connect the UART line as described on the PCB. 4. Power up the device and press 2, follow the instruction to set device and tftp server IP address and input the firmware file name. U-boot will then load the firmware and write it into the flash. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
140 lines
2.1 KiB
Plaintext
140 lines
2.1 KiB
Plaintext
/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "phicomm,k2g", "ralink,mt7620a-soc";
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model = "Phicomm K2G";
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aliases {
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serial0 = &uartlite;
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};
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gpio-leds {
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compatible = "gpio-leds";
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led_blue: blue {
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label = "k2g:blue:status";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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yellow {
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label = "k2g:yellow:status";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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};
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red {
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label = "k2g:red:status";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot@0 {
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reg = <0x0 0x30000>;
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read-only;
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};
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u-boot-env@30000 {
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: factory@40000 {
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reg = <0x40000 0x10000>;
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read-only;
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};
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permanent_config@50000 {
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reg = <0x50000 0x50000>;
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read-only;
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};
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firmware@a0000 {
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reg = <0xa0000 0x760000>;
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};
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uartf";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii2_pins &mdio_pins>;
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mtd-mac-address = <&factory 0x28>;
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mediatek,portmap = "llllw";
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&pcie {
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status = "okay";
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pcie-bridge {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pa_pins>;
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};
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