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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
30 lines
864 B
Diff
30 lines
864 B
Diff
From c221e05b50ca68daf5a20069ee1928171ef43bae Mon Sep 17 00:00:00 2001
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From: Biwen Li <biwen.li@nxp.com>
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Date: Sat, 14 Sep 2019 12:59:36 +0800
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Subject: [PATCH] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in
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deep sleep
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The patch fixes a bug that FlexTimer cannot
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wakeup system in deep sleep.
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Signed-off-by: Biwen Li <biwen.li@nxp.com>
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---
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arch/arm/boot/dts/ls1021a.dtsi | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/arch/arm/boot/dts/ls1021a.dtsi
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+++ b/arch/arm/boot/dts/ls1021a.dtsi
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@@ -965,6 +965,12 @@
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compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
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reg = <0x0 0x1ee2140 0x0 0x8>;
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#fsl,rcpm-wakeup-cells = <2>;
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+
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+ /*
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+ * The second and third entry compose an alt offset
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+ * address for IPPDEXPCR1(SCFG_SPARECR8)
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+ */
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+ fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>;
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};
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ftm_alarm0: timer0@29d0000 {
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