mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
6062d85892
Fixes: - CVE-2020-10757 The "mtd: rawnand: Pass a nand_chip object to nand_release()" commit was backported which needed some adaptations to other code. Run tested: ath79 Build tested: ath79 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
377 lines
10 KiB
Diff
377 lines
10 KiB
Diff
--- a/drivers/clk/clk-devres.c
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+++ b/drivers/clk/clk-devres.c
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@@ -34,6 +34,17 @@ struct clk *devm_clk_get(struct device *
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}
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EXPORT_SYMBOL(devm_clk_get);
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+struct clk *devm_clk_get_optional(struct device *dev, const char *id)
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+{
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+ struct clk *clk = devm_clk_get(dev, id);
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+
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+ if (clk == ERR_PTR(-ENOENT))
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+ return NULL;
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+
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+ return clk;
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+}
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+EXPORT_SYMBOL(devm_clk_get_optional);
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+
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struct clk_bulk_devres {
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struct clk_bulk_data *clks;
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int num_clks;
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--- a/drivers/pci/controller/pcie-mediatek.c
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+++ b/drivers/pci/controller/pcie-mediatek.c
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@@ -15,6 +15,7 @@
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/msi.h>
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+#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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@@ -167,6 +168,7 @@ struct mtk_pcie_soc {
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* @phy: pointer to PHY control block
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* @lane: lane count
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* @slot: port slot
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+ * @irq: GIC irq
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* @irq_domain: legacy INTx IRQ domain
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* @inner_domain: inner IRQ domain
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* @msi_domain: MSI IRQ domain
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@@ -187,6 +189,7 @@ struct mtk_pcie_port {
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struct phy *phy;
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u32 lane;
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u32 slot;
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+ int irq;
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struct irq_domain *irq_domain;
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struct irq_domain *inner_domain;
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struct irq_domain *msi_domain;
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@@ -230,10 +233,8 @@ static void mtk_pcie_subsys_powerdown(st
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clk_disable_unprepare(pcie->free_ck);
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- if (dev->pm_domain) {
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- pm_runtime_put_sync(dev);
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- pm_runtime_disable(dev);
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- }
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+ pm_runtime_put_sync(dev);
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+ pm_runtime_disable(dev);
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}
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static void mtk_pcie_port_free(struct mtk_pcie_port *port)
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@@ -537,6 +538,27 @@ static void mtk_pcie_enable_msi(struct m
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writel(val, port->base + PCIE_INT_MASK);
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}
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+static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie)
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+{
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+ struct mtk_pcie_port *port, *tmp;
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+
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+ list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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+ irq_set_chained_handler_and_data(port->irq, NULL, NULL);
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+
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+ if (port->irq_domain)
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+ irq_domain_remove(port->irq_domain);
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+
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+ if (IS_ENABLED(CONFIG_PCI_MSI)) {
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+ if (port->msi_domain)
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+ irq_domain_remove(port->msi_domain);
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+ if (port->inner_domain)
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+ irq_domain_remove(port->inner_domain);
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+ }
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+
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+ irq_dispose_mapping(port->irq);
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+ }
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+}
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+
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static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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@@ -566,6 +588,7 @@ static int mtk_pcie_init_irq_domain(stru
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port->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,
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&intx_domain_ops, port);
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+ of_node_put(pcie_intc_node);
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if (!port->irq_domain) {
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dev_err(dev, "failed to get INTx IRQ domain\n");
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return -ENODEV;
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@@ -627,7 +650,7 @@ static int mtk_pcie_setup_irq(struct mtk
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struct mtk_pcie *pcie = port->pcie;
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struct device *dev = pcie->dev;
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struct platform_device *pdev = to_platform_device(dev);
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- int err, irq;
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+ int err;
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err = mtk_pcie_init_irq_domain(port, node);
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if (err) {
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@@ -635,8 +658,9 @@ static int mtk_pcie_setup_irq(struct mtk
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return err;
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}
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- irq = platform_get_irq(pdev, port->slot);
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- irq_set_chained_handler_and_data(irq, mtk_pcie_intr_handler, port);
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+ port->irq = platform_get_irq(pdev, port->slot);
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+ irq_set_chained_handler_and_data(port->irq,
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+ mtk_pcie_intr_handler, port);
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return 0;
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}
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@@ -912,49 +936,29 @@ static int mtk_pcie_parse_port(struct mt
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/* sys_ck might be divided into the following parts in some chips */
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snprintf(name, sizeof(name), "ahb_ck%d", slot);
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- port->ahb_ck = devm_clk_get(dev, name);
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- if (IS_ERR(port->ahb_ck)) {
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- if (PTR_ERR(port->ahb_ck) == -EPROBE_DEFER)
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- return -EPROBE_DEFER;
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-
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- port->ahb_ck = NULL;
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- }
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+ port->ahb_ck = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(port->ahb_ck))
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+ return PTR_ERR(port->ahb_ck);
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snprintf(name, sizeof(name), "axi_ck%d", slot);
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- port->axi_ck = devm_clk_get(dev, name);
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- if (IS_ERR(port->axi_ck)) {
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- if (PTR_ERR(port->axi_ck) == -EPROBE_DEFER)
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- return -EPROBE_DEFER;
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-
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- port->axi_ck = NULL;
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- }
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+ port->axi_ck = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(port->axi_ck))
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+ return PTR_ERR(port->axi_ck);
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snprintf(name, sizeof(name), "aux_ck%d", slot);
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- port->aux_ck = devm_clk_get(dev, name);
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- if (IS_ERR(port->aux_ck)) {
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- if (PTR_ERR(port->aux_ck) == -EPROBE_DEFER)
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- return -EPROBE_DEFER;
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-
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- port->aux_ck = NULL;
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- }
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+ port->aux_ck = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(port->aux_ck))
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+ return PTR_ERR(port->aux_ck);
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snprintf(name, sizeof(name), "obff_ck%d", slot);
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- port->obff_ck = devm_clk_get(dev, name);
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- if (IS_ERR(port->obff_ck)) {
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- if (PTR_ERR(port->obff_ck) == -EPROBE_DEFER)
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- return -EPROBE_DEFER;
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-
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- port->obff_ck = NULL;
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- }
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+ port->obff_ck = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(port->obff_ck))
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+ return PTR_ERR(port->obff_ck);
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snprintf(name, sizeof(name), "pipe_ck%d", slot);
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- port->pipe_ck = devm_clk_get(dev, name);
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- if (IS_ERR(port->pipe_ck)) {
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- if (PTR_ERR(port->pipe_ck) == -EPROBE_DEFER)
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- return -EPROBE_DEFER;
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-
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- port->pipe_ck = NULL;
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- }
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+ port->pipe_ck = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(port->pipe_ck))
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+ return PTR_ERR(port->pipe_ck);
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snprintf(name, sizeof(name), "pcie-rst%d", slot);
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port->reset = devm_reset_control_get_optional_exclusive(dev, name);
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@@ -1007,10 +1011,8 @@ static int mtk_pcie_subsys_powerup(struc
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pcie->free_ck = NULL;
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}
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- if (dev->pm_domain) {
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- pm_runtime_enable(dev);
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- pm_runtime_get_sync(dev);
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- }
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+ pm_runtime_enable(dev);
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+ pm_runtime_get_sync(dev);
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/* enable top level clock */
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err = clk_prepare_enable(pcie->free_ck);
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@@ -1022,10 +1024,8 @@ static int mtk_pcie_subsys_powerup(struc
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return 0;
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err_free_ck:
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- if (dev->pm_domain) {
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- pm_runtime_put_sync(dev);
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- pm_runtime_disable(dev);
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- }
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+ pm_runtime_put_sync(dev);
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+ pm_runtime_disable(dev);
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return err;
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}
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@@ -1130,36 +1130,6 @@ static int mtk_pcie_request_resources(st
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return err;
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err = devm_pci_remap_iospace(dev, &pcie->pio, pcie->io.start);
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- if (err)
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- return err;
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-
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- return 0;
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-}
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-
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-static int mtk_pcie_register_host(struct pci_host_bridge *host)
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-{
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- struct mtk_pcie *pcie = pci_host_bridge_priv(host);
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- struct pci_bus *child;
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- int err;
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-
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- host->busnr = pcie->busn.start;
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- host->dev.parent = pcie->dev;
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- host->ops = pcie->soc->ops;
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- host->map_irq = of_irq_parse_and_map_pci;
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- host->swizzle_irq = pci_common_swizzle;
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- host->sysdata = pcie;
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-
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- err = pci_scan_root_bus_bridge(host);
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- if (err < 0)
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- return err;
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-
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- pci_bus_size_bridges(host->bus);
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- pci_bus_assign_resources(host->bus);
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-
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- list_for_each_entry(child, &host->bus->children, node)
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- pcie_bus_configure_settings(child);
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-
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- pci_bus_add_devices(host->bus);
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return 0;
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}
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@@ -1190,7 +1160,14 @@ static int mtk_pcie_probe(struct platfor
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if (err)
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goto put_resources;
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- err = mtk_pcie_register_host(host);
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+ host->busnr = pcie->busn.start;
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+ host->dev.parent = pcie->dev;
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+ host->ops = pcie->soc->ops;
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+ host->map_irq = of_irq_parse_and_map_pci;
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+ host->swizzle_irq = pci_common_swizzle;
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+ host->sysdata = pcie;
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+
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+ err = pci_host_probe(host);
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if (err)
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goto put_resources;
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@@ -1203,6 +1180,80 @@ put_resources:
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return err;
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}
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+
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+static void mtk_pcie_free_resources(struct mtk_pcie *pcie)
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+{
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+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
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+ struct list_head *windows = &host->windows;
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+
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+ pci_free_resource_list(windows);
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+}
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+
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+static int mtk_pcie_remove(struct platform_device *pdev)
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+{
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+ struct mtk_pcie *pcie = platform_get_drvdata(pdev);
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+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
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+
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+ pci_stop_root_bus(host->bus);
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+ pci_remove_root_bus(host->bus);
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+ mtk_pcie_free_resources(pcie);
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+
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+ mtk_pcie_irq_teardown(pcie);
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+
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+ mtk_pcie_put_resources(pcie);
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+
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+ return 0;
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+}
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+
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+static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev)
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+{
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+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
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+ struct mtk_pcie_port *port;
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+
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+ if (list_empty(&pcie->ports))
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+ return 0;
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+
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+ list_for_each_entry(port, &pcie->ports, list) {
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+ clk_disable_unprepare(port->pipe_ck);
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+ clk_disable_unprepare(port->obff_ck);
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+ clk_disable_unprepare(port->axi_ck);
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+ clk_disable_unprepare(port->aux_ck);
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+ clk_disable_unprepare(port->ahb_ck);
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+ clk_disable_unprepare(port->sys_ck);
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+ phy_power_off(port->phy);
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+ phy_exit(port->phy);
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+ }
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+
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+ clk_disable_unprepare(pcie->free_ck);
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+
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+ return 0;
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+}
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+
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+static int __maybe_unused mtk_pcie_resume_noirq(struct device *dev)
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+{
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+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
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+ struct mtk_pcie_port *port, *tmp;
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+
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+ if (list_empty(&pcie->ports))
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+ return 0;
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+
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+ clk_prepare_enable(pcie->free_ck);
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+
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+ list_for_each_entry_safe(port, tmp, &pcie->ports, list)
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+ mtk_pcie_enable_port(port);
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+
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+ /* In case of EP was removed while system suspend. */
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+ if (list_empty(&pcie->ports))
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+ clk_disable_unprepare(pcie->free_ck);
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+
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+ return 0;
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+}
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+
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+static const struct dev_pm_ops mtk_pcie_pm_ops = {
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+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_pcie_suspend_noirq,
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+ mtk_pcie_resume_noirq)
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+};
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+
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static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {
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.ops = &mtk_pcie_ops,
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.startup = mtk_pcie_startup_port,
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@@ -1241,10 +1292,13 @@ static const struct of_device_id mtk_pci
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static struct platform_driver mtk_pcie_driver = {
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.probe = mtk_pcie_probe,
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+ .remove = mtk_pcie_remove,
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.driver = {
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.name = "mtk-pcie",
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.of_match_table = mtk_pcie_ids,
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.suppress_bind_attrs = true,
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+ .pm = &mtk_pcie_pm_ops,
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},
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};
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-builtin_platform_driver(mtk_pcie_driver);
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+module_platform_driver(mtk_pcie_driver);
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+MODULE_LICENSE("GPL v2");
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--- a/include/linux/clk.h
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+++ b/include/linux/clk.h
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@@ -349,6 +349,17 @@ int __must_check devm_clk_bulk_get(struc
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struct clk *devm_clk_get(struct device *dev, const char *id);
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/**
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+ * devm_clk_get_optional - lookup and obtain a managed reference to an optional
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+ * clock producer.
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+ * @dev: device for clock "consumer"
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+ * @id: clock consumer ID
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+ *
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+ * Behaves the same as devm_clk_get() except where there is no clock producer.
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+ * In this case, instead of returning -ENOENT, the function returns NULL.
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+ */
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+struct clk *devm_clk_get_optional(struct device *dev, const char *id);
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+
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+/**
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* devm_get_clk_from_child - lookup and obtain a managed reference to a
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* clock producer from child node.
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* @dev: device for clock "consumer"
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