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1d94f72439
Rebased patches:
* generic: 273-batman-adv-Convert-packet.h-to-uapi-header.patch
* ipq806x: 0065-arm-override-compiler-flags.patch
* mvebu: 513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch
Removed patches:
Fixed upstream:
* ar71xx: 821-serial-core-add-support-for-boot-console-with-arbitr.patch
* ath79: 921-serial-core-add-support-for-boot-console-with-arbitr.patch
- in 4.14.256 via 9112e7ef87149b3d8093e7446d784117f6e18d69
* mvebu: 527-PCI-aardvark-allow-to-specify-link-capability.patch
- in 4.14.257 via 62a3dc9b65a2b24800fc4267b8cf590fad135034
* mvebu: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
- should be hopefully fixed by the bunch of changes in .256 and .257
Run tested on ipq40xx/glinet-b1300 and mvebu/turris-omnia.
Fixes: CVE-2021-3640
Signed-off-by: Petr Štetiar <ynezz@true.cz>
20 lines
613 B
Diff
20 lines
613 B
Diff
--- a/arch/mips/kernel/mips-cm.c
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+++ b/arch/mips/kernel/mips-cm.c
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@@ -236,6 +236,7 @@ int mips_cm_probe(void)
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/* disable CM regions */
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write_gcr_reg0_base(CM_GCR_REGn_BASE_BASEADDR);
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+ /*
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write_gcr_reg0_mask(CM_GCR_REGn_MASK_ADDRMASK);
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write_gcr_reg1_base(CM_GCR_REGn_BASE_BASEADDR);
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write_gcr_reg1_mask(CM_GCR_REGn_MASK_ADDRMASK);
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@@ -243,7 +244,7 @@ int mips_cm_probe(void)
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write_gcr_reg2_mask(CM_GCR_REGn_MASK_ADDRMASK);
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write_gcr_reg3_base(CM_GCR_REGn_BASE_BASEADDR);
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write_gcr_reg3_mask(CM_GCR_REGn_MASK_ADDRMASK);
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-
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+*/
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/* probe for an L2-only sync region */
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mips_cm_probe_l2sync();
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