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a1c6a316d2
FON2601 is a wireless router.
Specification:
- SoC: Mediatek MT7620A (580MHz)
- RAM: 128 MiB
- ROM: 16 MiB SPI Flash
- Wireless:
for 11b/g/n (upto 300 Mbps): MT7620A built-in WMAC
for 11a/n/ac (upto 867 Mbps): MT7662E
- Ethernet LAN: 1 port, upto 100 Mbps
- Ethernet WAN: 1 port, upto 1000 Mbps
- USB: 1 port (USB 2.0 host)
- LEDs: 4 (all can be controlled by SoC's GPIO)
- buttons: 1 (Displayed as "WPS" on enclosure)
- serial port: 57600n8
pins: Vcc(3.3V), Rx, Tx, GND
(left to right, viewed from outside of board)
Installation (only available via UART):
1. download sysupgrade binary image by wget command
2. write sysupgrade binary image to Flash
command is:
mtd write sysupgrade.bin firmware
3. reboot
Important Notice:
Only one button is displayed as "WPS" on enclosure.
However, it is configured as "reset" (factory resetting feature).
Signed-off-by: NOGUCHI Hiroshi <drvlabo@gmail.com>
[removed unrelated openwrt-keyring revert, missing -Wall for uimage_padhdr]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
167 lines
2.5 KiB
Plaintext
167 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "fon,fon2601", "ralink,mt7620a-soc";
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model = "Fon FON2601";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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leds {
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compatible = "gpio-leds";
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led_power: power_r {
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label = "fon2601:red:power";
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gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
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};
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internet_g {
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label = "fon2601:green:internet";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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net_g {
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label = "fon2601:green:net";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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wifi_g {
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label = "fon2601:green:wifi";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "fonfxc,uimage";
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label = "firmware";
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reg = <0x50000 0xf90000>;
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};
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partition@fe0000 {
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label = "board_data";
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reg = <0xfe0000 0x20000>;
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read-only;
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};
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};
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};
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};
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&state_default {
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gpio {
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ralink,group = "i2c", "uartf";
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ralink,function = "gpio";
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};
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nd_sd {
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ralink,group = "nd_sd";
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ralink,function = "sd";
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};
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spi_cs {
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ralink,group = "spi refclk";
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ralink,function = "spi refclk";
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii2_pins &mdio_pins>;
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mtd-mac-address = <&factory 0x4>;
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,port4 = "gmac";
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pa_pins>, <&wled_pins>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "pci14c3,7662";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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