mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 09:12:39 +00:00
05ccca031e
This conversion appears to have been overlooked since it's in a kernel patch. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
91 lines
1.6 KiB
Diff
91 lines
1.6 KiB
Diff
--- a/arch/arm/boot/dts/mt7629-rfb.dts
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+++ b/arch/arm/boot/dts/mt7629-rfb.dts
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@@ -18,6 +18,7 @@
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chosen {
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stdout-path = "serial0:115200n8";
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+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
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};
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gpio-keys {
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@@ -36,6 +37,13 @@
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};
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};
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+ gsw: gsw@0 {
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+ compatible = "mediatek,mt753x";
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+ mediatek,ethsys = <ðsys>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x10000000>;
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@@ -70,6 +78,10 @@
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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+
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+ nvmem-cells = <&macaddr_factory_2a>;
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+ nvmem-cell-names = "mac-address";
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+
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fixed-link {
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speed = <2500>;
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full-duplex;
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@@ -82,6 +94,9 @@
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&phy0>;
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+
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+ nvmem-cells = <&macaddr_factory_24>;
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+ nvmem-cell-names = "mac-address";
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};
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mdio: mdio-bus {
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@@ -94,6 +109,26 @@
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};
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};
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+&gsw {
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+ mediatek,mdio = <&mdio>;
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+ mediatek,portmap = "llllw";
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+ mediatek,mdio_master_pinmux = <0>;
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+ reset-gpios = <&pio 28 0>;
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+ interrupt-parent = <&pio>;
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+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "okay";
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+
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+ port6: port@6 {
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+ compatible = "mediatek,mt753x-port";
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+ reg = <6>;
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+ phy-mode = "sgmii";
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ };
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+ };
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+};
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+
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&i2c {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins>;
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@@ -272,3 +307,17 @@
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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+
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+&factory {
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+ compatible = "nvmem-cells";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ macaddr_factory_24: macaddr@24 {
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+ reg = <0x24 0x6>;
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+ };
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+
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+ macaddr_factory_2a: macaddr@2a {
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+ reg = <0x2a 0x6>;
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+ };
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+};
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