mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
d57223259b
Some boards were apparently forgotten when ralink,portmap was renamed to mediatek,portmap -- probably because they used the long obsolete ralink,port-map attribute. If this commit breaks ethernet wan/lan assignment, this is because the port-map attribute wasn't actually parsed, you'll have to replace "wllll" by "llllw" in the dts file belonging to that board (and send a patch doing that!) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
94 lines
1.4 KiB
Plaintext
94 lines
1.4 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7628an.dtsi"
|
|
|
|
/ {
|
|
compatible = "mercury,mac1200rv2", "mediatek,mt7628an-soc";
|
|
model = "Mercury MAC1200R v2";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,57600";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x2000000>;
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
status {
|
|
label = "mac1200rv2:green:status";
|
|
gpios = <&gpio0 11 1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0 0>;
|
|
spi-max-frequency = <10000000>;
|
|
m25p,chunked-io = <32>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x1d800>;
|
|
};
|
|
|
|
factory: partition@0x1d800 {
|
|
label = "factory_info";
|
|
reg = <0x1d800 0x800>;
|
|
read-only;
|
|
};
|
|
|
|
art: partition@0x1e000 {
|
|
label = "art";
|
|
reg = <0x1e000 0x2000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@20000 {
|
|
label = "config";
|
|
reg = <0x20000 0x10000>;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot2";
|
|
reg = <0x30000 0x10000>;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "firmware";
|
|
reg = <0x40000 0x7c0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
mtd-mac-address = <&factory 0xd>;
|
|
mediatek,portmap = "llllw";
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
ralink,mtd-eeprom = <&art 0x0>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
pcie-bridge {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
device_type = "pci";
|
|
mediatek,mtd-eeprom = <&art 0x1000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|
|
};
|