mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
6525bffc0a
The DWR-921-C1 Wireless Routers with LTE embedded modem is based on the MT7620N SoC. Specification: * MediaTek MT7620N (580 Mhz) * 64 MB of RAM * 16 MB of FLASH * 802.11bgn radio * 5x 10/100 Mbps Ethernet (1 WAN and 4 LAN) * 2x external, detachable (LTE) antennas * UART header on PCB (57600 8n1) * 6x LED (GPIO-controlled) * 1x bi-color Signal Strength LED (GPIO-controlled) * 2x button * JBOOT bootloader The status led has been assigned to the dwr-921-c1:green:sigstrength (lte signal strength) led. At the end of the boot it is switched off and is available for lte operation. Work correctly also during sysupgrade operation. Installation: Apply factory image via d-link http web-gui. How to revert to OEM firmware: 1.) Push the reset button and turn on the power. Wait until LED start blinking (~10sec.) 2.) Upload original factory image via JBOOT http (IP: 192.168.123.254) 3.) If http doesn't work, it can be done with curl command: curl -F FN=@XXXXX.bin http://192.168.123.254/upg where XXXXX.bin is name of firmware file. Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
145 lines
2.2 KiB
Plaintext
145 lines
2.2 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7620n.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "dlink,dwr-921-c1", "ralink,mt7620n-soc";
|
|
model = "D-Link DWR-921 C1";
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
poll-interval = <20>;
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
sms {
|
|
label = "dwr-921-c1:green:sms";
|
|
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
lan {
|
|
label = "dwr-921-c1:green:lan";
|
|
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
sstrengthg {
|
|
label = "dwr-921-c1:green:sigstrength";
|
|
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sstrengthr {
|
|
label = "dwr-921-c1:red:sigstrength";
|
|
gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
4g {
|
|
label = "dwr-921-c1:green:4g";
|
|
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
3g {
|
|
label = "dwr-921-c1:green:3g";
|
|
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wifi {
|
|
label = "dwr-921-c1:green:wifi";
|
|
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio_export {
|
|
compatible = "gpio-export";
|
|
#size-cells = <0>;
|
|
|
|
lte_modem_enable {
|
|
gpio-export,name = "lte_modem_enable";
|
|
gpio-export,output = <1>;
|
|
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partition@0 {
|
|
label = "jboot";
|
|
reg = <0x0 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@10000 {
|
|
label = "firmware";
|
|
reg = <0x10000 0xfe0000>;
|
|
};
|
|
|
|
config: partition@ff0000 {
|
|
label = "config";
|
|
reg = <0xff0000 0x10000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
ðernet {
|
|
port@4 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
default {
|
|
ralink,group = "spi refclk", "i2c", "ephy", "wled";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|