openwrt/target/linux/ramips/dts/mt7621_linksys_e7350.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "linksys,e7350", "mediatek,mt7621-soc";
	model = "Linksys E7350";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led-wps {
			color = <LED_COLOR_ID_AMBER>;
			function = LED_FUNCTION_WPS;
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};

		led_power: led-power {
			label = "blue:power";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		led-wan {
			color = <LED_COLOR_ID_AMBER>;
			function = LED_FUNCTION_WAN;
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};
	};
};

&nand {
	status = "okay";

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "Boot";
			reg = <0x0 0x80000>;
			read-only;
		};

		partition@80000 {
			label = "Config";
			reg = <0x80000 0x80000>;
		};

		factory: partition@100000 {
			compatible = "nvmem-cells";
			label = "Factory";
			reg = <0x100000 0x80000>;
			#address-cells = <1>;
			#size-cells = <1>;
			read-only;

			eeprom_factory_0: eeprom@0 {
				reg = <0x0 0xe00>;
			};
		};

		partition@180000 {
			label = "firmware";
			reg = <0x180000 0x3000000>;

			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "kernel";
				reg = <0x0 0x400000>;
			};

			partition@400000 {
				label = "ubi";
				reg = <0x400000 0x2c00000>;
			};
		};

		partition@3180000 {
			label = "alt_firmware";
			reg = <0x3180000 0x3000000>;
			read-only;
		};

		partition@6180000 {
			label = "cbtinfo";
			reg = <0x6180000 0x80000>;
			read-only;
		};
		/* seems to be the end here. Can't read past 0x6200000 */
	};
};

&pcie {
	status = "okay";
};

&pcie1 {
	wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_0>;
		nvmem-cell-names = "eeprom";
	};
};

&state_default {
	gpio {
		groups = "i2c", "uart3", "jtag", "wdt";
		function = "gpio";
	};
};

&gmac1 {
	status = "okay";
	label = "wan";
	phy-handle = <&ethphy0>;
};

&mdio {
	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&switch0 {
	ports {
		port@1 {
			status = "okay";
			label = "lan4";
		};

		port@2 {
			status = "okay";
			label = "lan3";
		};

		port@3 {
			status = "okay";
			label = "lan2";
		};

		port@4 {
			status = "okay";
			label = "lan1";
		};
	};
};