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f53fa2a0cb
This patch converts MT761{0,2,3} PCIe WiFi calibration data to NVMEM
format for legacy Ralink SoCs (MT7620 and Mt7628). The EEPROM size of
the MT7610 and MT7612 is 0x200. there are only three devices uses
MT7613 NIC, ASUS RT-AC1200 V2, COMFAST CF-WR758AC V2 and Keenetic
KN-1613. The EEPROM size of them is 0x4da8.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
203 lines
3.0 KiB
Plaintext
203 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc";
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model = "Head Weblink HDRM200";
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aliases {
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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};
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chosen {
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bootargs = "console=ttyS1,57600";
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};
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leds {
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compatible = "gpio-leds";
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rssi {
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label = "red:rssi";
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gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
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};
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led_system: system {
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label = "green:system";
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gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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};
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air {
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label = "green:wifi";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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compatible = "nvmem-cells";
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label = "factory";
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reg = <0x40000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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firmware: partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,port4-gmac;
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mediatek,ephy-base = /bits/ 8 <8>;
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};
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&wmac {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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&state_default {
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default {
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groups = "i2c", "uartf", "pa", "spi refclk",
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"wled";
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function = "gpio";
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&uart {
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status = "okay";
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};
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