mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 17:48:58 +00:00
f53fa2a0cb
This patch converts MT761{0,2,3} PCIe WiFi calibration data to NVMEM
format for legacy Ralink SoCs (MT7620 and Mt7628). The EEPROM size of
the MT7610 and MT7612 is 0x200. there are only three devices uses
MT7613 NIC, ASUS RT-AC1200 V2, COMFAST CF-WR758AC V2 and Keenetic
KN-1613. The EEPROM size of them is 0x4da8.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
168 lines
2.5 KiB
Plaintext
168 lines
2.5 KiB
Plaintext
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "dovado,tiny-ac", "ralink,mt7620a-soc";
|
|
model = "Dovado Tiny AC";
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
usb {
|
|
label = "green:usb";
|
|
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&ohci_port1>, <&ehci_port1>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
|
|
wifi {
|
|
label = "orange:wifi";
|
|
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
gpio_export {
|
|
compatible = "gpio-export";
|
|
#size-cells = <0>;
|
|
|
|
usbpower {
|
|
gpio-export,name = "usbpower";
|
|
gpio-export,output = <1>;
|
|
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
compatible = "nvmem-cells";
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
read-only;
|
|
|
|
eeprom_factory_8000: eeprom@8000 {
|
|
reg = <0x8000 0x200>;
|
|
};
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
|
|
|
|
mediatek,portmap = "llllw";
|
|
|
|
port@4 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
phy-handle = <&phy4>;
|
|
};
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
phy-handle = <&phy5>;
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
phy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy5: ethernet-phy@5 {
|
|
reg = <5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,port4-gmac;
|
|
mediatek,ephy-base = /bits/ 8 <8>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "uartf", "nd_sd", "wled";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&pcie0 {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
nvmem-cells = <&eeprom_factory_8000>;
|
|
nvmem-cell-names = "eeprom";
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|