Felix Fietkau 5dc134c542 Fix VLYNQ device enable for DG834Gv1
This patch allows VLYNQ devices on the DG834Gv1 to be successfully
enabled.

Currently the "__vlynq_enable_device" function attempts to set the VLYNQ
device clock divisor to values from 1 through 8 until a link is
successfully established. On the DG834Gv1 (but not the DG834Gv2),
setting the VLYNQ device clock divisor to 1 (full rate) results in all
further VLYNQ operations failing (including software reset), so the
device is never enabled. This patches changes the function to only
attempt divisors 2 through 8, and hence the device is successfully
enabled.

Signed-off-by: Nick Forbes <nick.forbes@huntsworth.com>

---------

SVN-Revision: 9656
2007-12-04 12:49:54 +00:00
2007-12-03 21:21:17 +00:00
2007-11-20 19:58:49 +00:00
2007-10-13 02:05:06 +00:00
2007-02-26 01:05:09 +00:00
2007-11-20 13:21:01 +00:00
2016-03-20 17:29:15 +01:00

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