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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
183 lines
4.8 KiB
Diff
183 lines
4.8 KiB
Diff
From a934bc7776953d7ce8e27c2d8720de58d5ceeeef Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 30 Jul 2020 15:13:09 +0100
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Subject: [PATCH] overlays: Fix sc16is75x overlays w.r.t. serdev
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Enabling serdev support in rpi-5.4.y had the unintended consequence of
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making any UART device node with a subnode look like a "serdev" node,
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which prevents it from having the usual /dev/ttyXXX character device.
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Solve the problem by moving the subnode (a static clock declaration)
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into the root node.
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At the same time, regularise (and sometimes correct) the overlays.
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See: https://github.com/raspberrypi/linux/issues/3765
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../dts/overlays/sc16is750-i2c-overlay.dts | 23 +++++++++-------
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.../dts/overlays/sc16is752-i2c-overlay.dts | 27 ++++++++++---------
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.../dts/overlays/sc16is752-spi0-overlay.dts | 21 +++++++++------
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.../dts/overlays/sc16is752-spi1-overlay.dts | 6 ++---
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4 files changed, 45 insertions(+), 32 deletions(-)
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--- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
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@@ -13,26 +13,31 @@
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sc16is750: sc16is750@48 {
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compatible = "nxp,sc16is750";
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- reg = <0x48>; /* address */
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+ reg = <0x48>; /* i2c address */
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clocks = <&sc16is750_clk>;
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interrupt-parent = <&gpio>;
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interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
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+ gpio-controller;
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#gpio-cells = <2>;
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-
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- sc16is750_clk: sc16is750_clk {
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- compatible = "fixed-clock";
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- #clock-cells = <0>;
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- clock-frequency = <14745600>;
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- };
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+ i2c-max-frequency = <400000>;
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};
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};
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};
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+ fragment@1 {
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+ target-path = "/";
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+ __overlay__ {
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+ sc16is750_clk: sc16is750_i2c_clk@48 {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <14745600>;
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+ };
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+ };
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+ };
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__overrides__ {
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int_pin = <&sc16is750>,"interrupts:0";
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- addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name";
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+ addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name";
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xtal = <&sc16is750_clk>,"clock-frequency:0";
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};
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-
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};
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--- a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
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@@ -5,29 +5,32 @@
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compatible = "brcm,bcm2835";
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fragment@0 {
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- target = <&i2c1>;
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-
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- frag1: __overlay__ {
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+ target = <&i2c_arm>;
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+ __overlay__ {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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sc16is752: sc16is752@48 {
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compatible = "nxp,sc16is752";
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- reg = <0x48>; // i2c address
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+ reg = <0x48>; /* i2c address */
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clocks = <&sc16is752_clk>;
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interrupt-parent = <&gpio>;
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- interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
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+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
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gpio-controller;
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- #gpio-cells = <0>;
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+ #gpio-cells = <2>;
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i2c-max-frequency = <400000>;
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- status = "okay";
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+ };
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+ };
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+ };
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- sc16is752_clk: sc16is752_clk {
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- compatible = "fixed-clock";
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- #clock-cells = <0>;
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- clock-frequency = <14745600>;
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- };
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+ fragment@1 {
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+ target-path = "/";
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+ __overlay__ {
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+ sc16is752_clk: sc16is752_i2c_clk@48 {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <14745600>;
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};
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};
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};
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--- a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
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@@ -17,15 +17,9 @@
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clocks = <&sc16is752_clk>;
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interrupt-parent = <&gpio>;
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interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
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- #gpio-controller;
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+ gpio-controller;
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#gpio-cells = <2>;
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spi-max-frequency = <4000000>;
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-
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- sc16is752_clk: sc16is752_clk {
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- compatible = "fixed-clock";
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- #clock-cells = <0>;
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- clock-frequency = <14745600>;
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- };
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};
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};
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};
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@@ -37,8 +31,19 @@
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};
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};
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+ fragment@2 {
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+ target-path = "/";
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+ __overlay__ {
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+ sc16is752_clk: sc16is752_spi0_0_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <14745600>;
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+ };
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+ };
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+ };
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+
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__overrides__ {
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int_pin = <&sc16is752>,"interrupts:0";
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- xtal = <&sc16is752_clk>, "clock-frequency:0";
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+ xtal = <&sc16is752_clk>,"clock-frequency:0";
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};
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};
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--- a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
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@@ -21,7 +21,7 @@
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fragment@1 {
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target = <&spi1>;
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- frag1: __overlay__ {
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+ __overlay__ {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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@@ -35,7 +35,7 @@
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clocks = <&sc16is752_clk>;
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interrupt-parent = <&gpio>;
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interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
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- #gpio-controller;
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+ gpio-controller;
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#gpio-cells = <2>;
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spi-max-frequency = <4000000>;
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};
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@@ -52,7 +52,7 @@
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fragment@3 {
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target-path = "/";
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__overlay__ {
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- sc16is752_clk: sc16is752_spi1_clk {
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+ sc16is752_clk: sc16is752_spi1_0_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <14745600>;
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