mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 01:28:59 +00:00
2d69d098e0
The following patch was integrated upstream: target/linux/bcm4908/patches-5.4/180-i2c-brcmstb-fix-support-for-DSL-and-CM-variants.patch All other updated automatically. The new config option CONFIG_BPF_UNPRIV_DEFAULT_OFF is now handled too. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
73 lines
2.1 KiB
Diff
73 lines
2.1 KiB
Diff
From 0f5cf5dcc3ca4f8e610ebe1e62e3d3546b9d09ca Mon Sep 17 00:00:00 2001
|
|
From: Yangbo Lu <yangbo.lu@nxp.com>
|
|
Date: Mon, 16 Sep 2019 19:17:44 +0800
|
|
Subject: [PATCH] mmc: sdhci-of-esdhc: poll ESDHC_FLUSH_ASYNC_FIFO bit until
|
|
completion
|
|
|
|
The ESDHC_FLUSH_ASYNC_FIFO bit which is set to flush asynchronous FIFO
|
|
should be polled until it's auto cleared by hardware.
|
|
|
|
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
|
|
---
|
|
drivers/mmc/host/sdhci-of-esdhc.c | 35 ++++++++++++++++++++++++++++-------
|
|
1 file changed, 28 insertions(+), 7 deletions(-)
|
|
|
|
--- a/drivers/mmc/host/sdhci-of-esdhc.c
|
|
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
|
|
@@ -596,6 +596,32 @@ static void esdhc_clock_enable(struct sd
|
|
}
|
|
}
|
|
|
|
+static void esdhc_flush_async_fifo(struct sdhci_host *host)
|
|
+{
|
|
+ ktime_t timeout;
|
|
+ u32 val;
|
|
+
|
|
+ val = sdhci_readl(host, ESDHC_DMA_SYSCTL);
|
|
+ val |= ESDHC_FLUSH_ASYNC_FIFO;
|
|
+ sdhci_writel(host, val, ESDHC_DMA_SYSCTL);
|
|
+
|
|
+ /* Wait max 20 ms */
|
|
+ timeout = ktime_add_ms(ktime_get(), 20);
|
|
+ while (1) {
|
|
+ bool timedout = ktime_after(ktime_get(), timeout);
|
|
+
|
|
+ if (!(sdhci_readl(host, ESDHC_DMA_SYSCTL) &
|
|
+ ESDHC_FLUSH_ASYNC_FIFO))
|
|
+ break;
|
|
+ if (timedout) {
|
|
+ pr_err("%s: flushing asynchronous FIFO timeout.\n",
|
|
+ mmc_hostname(host->mmc));
|
|
+ break;
|
|
+ }
|
|
+ usleep_range(10, 20);
|
|
+ }
|
|
+}
|
|
+
|
|
static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
|
|
{
|
|
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
|
@@ -688,9 +714,7 @@ static void esdhc_of_set_clock(struct sd
|
|
sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL);
|
|
|
|
esdhc_clock_enable(host, false);
|
|
- temp = sdhci_readl(host, ESDHC_DMA_SYSCTL);
|
|
- temp |= ESDHC_FLUSH_ASYNC_FIFO;
|
|
- sdhci_writel(host, temp, ESDHC_DMA_SYSCTL);
|
|
+ esdhc_flush_async_fifo(host);
|
|
}
|
|
|
|
/* Wait max 20 ms */
|
|
@@ -892,10 +916,7 @@ static void esdhc_tuning_block_enable(st
|
|
u32 val;
|
|
|
|
esdhc_clock_enable(host, false);
|
|
-
|
|
- val = sdhci_readl(host, ESDHC_DMA_SYSCTL);
|
|
- val |= ESDHC_FLUSH_ASYNC_FIFO;
|
|
- sdhci_writel(host, val, ESDHC_DMA_SYSCTL);
|
|
+ esdhc_flush_async_fifo(host);
|
|
|
|
val = sdhci_readl(host, ESDHC_TBCTL);
|
|
if (enable)
|