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e9f5b773d2
BCM63xx SoCs have an external interrupt controller which can be used for specific GPIO keys. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
592 lines
12 KiB
Plaintext
592 lines
12 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include <dt-bindings/clock/bcm63268-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/reset/bcm63268-reset.h>
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#include <dt-bindings/soc/bcm63268-pm.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm63268";
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aliases {
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nflash = &nflash;
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pinctrl = &pinctrl;
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &lsspi;
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spi1 = &hsspi;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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clocks {
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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hsspi_osc: hsspi-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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clock-output-names = "hsspi_osc";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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mips-hpt-frequency = <200000000>;
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cpu@0 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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};
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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memory@0 {
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device_type = "memory";
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reg = <0 0>;
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};
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ubus {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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periph_clk: clock-controller@10000004 {
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compatible = "brcm,bcm63268-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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pll_cntl: syscon@10000008 {
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compatible = "syscon", "simple-mfd";
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reg = <0x10000008 0x4>;
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native-endian;
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syscon-reboot {
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compatible = "syscon-reboot";
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offset = <0x0>;
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mask = <0x1>;
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};
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};
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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ext_intc: interrupt-controller@10000018 {
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#address-cells = <1>;
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0x10000018 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_EXT0>,
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<BCM63268_IRQ_EXT1>,
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<BCM63268_IRQ_EXT2>,
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<BCM63268_IRQ_EXT3>;
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};
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periph_intc: interrupt-controller@10000020 {
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#address-cells = <1>;
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compatible = "brcm,bcm6345-l1-intc";
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reg = <0x10000020 0x20>,
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<0x10000040 0x20>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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wdt: watchdog@1000009c {
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compatible = "brcm,bcm7038-wdt";
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reg = <0x1000009c 0xc>;
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clocks = <&periph_osc>;
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timeout-sec = <30>;
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};
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timer_clk: clock-controller@100000ac {
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compatible = "brcm,bcm63268-timer-clocks";
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reg = <0x100000ac 0x4>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gpio_cntl: syscon@100000c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm63268-gpio-sysctl",
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"syscon", "simple-mfd";
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reg = <0x100000c0 0x80>;
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ranges = <0 0x100000c0 0x80>;
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native-endian;
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gpio: gpio@0 {
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compatible = "brcm,bcm63268-gpio";
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reg-names = "dirout", "dat";
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reg = <0x0 0x8>, <0x8 0x8>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 52>;
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#gpio-cells = <2>;
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};
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pinctrl: pinctrl@10 {
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compatible = "brcm,bcm63268-pinctrl";
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reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;
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pinctrl_serial_led: serial_led-pins {
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pinctrl_serial_led_clk: serial_led_clk-pins {
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function = "serial_led_clk";
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pins = "gpio0";
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};
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pinctrl_serial_led_data: serial_led_data-pins {
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function = "serial_led_data";
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pins = "gpio1";
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};
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};
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pinctrl_hsspi_cs4: hsspi_cs4-pins {
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function = "hsspi_cs4";
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pins = "gpio16";
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};
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pinctrl_hsspi_cs5: hsspi_cs5-pins {
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function = "hsspi_cs5";
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pins = "gpio17";
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};
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pinctrl_hsspi_cs6: hsspi_cs6-pins {
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function = "hsspi_cs6";
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pins = "gpio8";
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};
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pinctrl_hsspi_cs7: hsspi_cs7-pins {
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function = "hsspi_cs7";
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pins = "gpio9";
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};
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pinctrl_adsl_spi: adsl_spi {
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pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
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function = "adsl_spi_miso";
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pins = "gpio18";
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};
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pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
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function = "adsl_spi_mosi";
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pins = "gpio19";
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};
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};
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pinctrl_vreq_clk: vreq_clk-pins {
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function = "vreq_clk";
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pins = "gpio22";
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};
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pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {
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function = "pcie_clkreq_b";
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pins = "gpio23";
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};
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pinctrl_robosw_led_clk: robosw_led_clk-pins {
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function = "robosw_led_clk";
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pins = "gpio30";
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};
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pinctrl_robosw_led_data: robosw_led_data-pins {
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function = "robosw_led_data";
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pins = "gpio31";
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};
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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};
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pinctrl_gpio35_alt: gpio35_alt-pins {
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function = "gpio35_alt";
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pin = "gpio35";
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};
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pinctrl_dectpd: dectpd-pins {
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function = "dectpd";
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group = "dectpd_grp";
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};
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pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
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function = "vdsl_phy_override_0";
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group = "vdsl_phy_override_0_grp";
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};
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pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
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function = "vdsl_phy_override_1";
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group = "vdsl_phy_override_1_grp";
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};
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pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
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function = "vdsl_phy_override_2";
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group = "vdsl_phy_override_2_grp";
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};
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pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
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function = "vdsl_phy_override_3";
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group = "vdsl_phy_override_3_grp";
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};
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pinctrl_dsl_gpio8: dsl_gpio8-pins {
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function = "dsl_gpio8";
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group = "dsl_gpio8";
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};
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pinctrl_dsl_gpio9: dsl_gpio9-pins {
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function = "dsl_gpio9";
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group = "dsl_gpio9";
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};
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};
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};
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uart0: serial@10000180 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000180 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_UART0>;
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clocks = <&periph_osc>;
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clock-names = "periph";
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status = "disabled";
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};
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uart1: serial@100001a0 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x100001a0 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_UART1>;
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clocks = <&periph_osc>;
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clock-names = "periph";
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status = "disabled";
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};
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nflash: nand@10000200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm6368",
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"brcm,brcmnand-v4.0",
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"brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x10000600 0x200>,
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<0x100000b0 0x10>;
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reg-names = "nand",
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"nand-cache",
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"nand-int-base";
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_NAND>;
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clocks = <&periph_clk BCM63268_CLK_NAND>;
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clock-names = "nand";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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status = "disabled";
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};
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lsspi: spi@10000800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6358-spi";
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reg = <0x10000800 0x70c>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_LSSPI>;
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clocks = <&periph_clk BCM63268_CLK_SPI>;
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clock-names = "spi";
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resets = <&periph_rst BCM63268_RST_SPI>;
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status = "disabled";
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};
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hsspi: spi@10001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_HSSPI>;
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clocks = <&periph_clk BCM63268_CLK_HSSPI>,
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<&hsspi_osc>;
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clock-names = "hsspi",
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"pll";
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resets = <&periph_rst BCM63268_RST_SPI>;
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status = "disabled";
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};
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serdes_cntl: syscon@10001804 {
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compatible = "syscon";
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reg = <0x10001804 0x4>;
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native-endian;
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};
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periph_pwr: power-controller@1000184c {
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compatible = "brcm,bcm63268-power-controller";
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reg = <0x1000184c 0x4>;
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#power-domain-cells = <1>;
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};
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leds: led-controller@10001900 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-leds";
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reg = <0x10001900 0x24>;
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status = "disabled";
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};
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ehci: usb@10002500 {
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compatible = "brcm,bcm63268-ehci", "generic-ehci";
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reg = <0x10002500 0x100>;
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big-endian;
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spurious-oc;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_EHCI>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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ohci: usb@10002600 {
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compatible = "brcm,bcm63268-ohci", "generic-ohci";
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reg = <0x10002600 0x100>;
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big-endian;
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no-big-frame-no;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_OHCI>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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usbh: usb-phy@10002700 {
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compatible = "brcm,bcm63268-usbh-phy";
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reg = <0x10002700 0x38>;
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#phy-cells = <1>;
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clocks = <&periph_clk BCM63268_CLK_USBH>,
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<&timer_clk BCM63268_TCLK_USB_REF>;
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clock-names = "usbh",
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"usb_ref";
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power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
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resets = <&periph_rst BCM63268_RST_USBH>;
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status = "disabled";
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};
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random: rng@10002880 {
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compatible = "brcm,bcm6368-rng";
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reg = <0x10002880 0x14>;
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clocks = <&periph_clk BCM63268_CLK_IPSEC>;
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clock-names = "ipsec";
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resets = <&periph_rst BCM63268_RST_IPSEC>;
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power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_IPSEC>;
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};
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ethernet: ethernet@1000d800 {
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compatible = "brcm,bcm63268-enetsw";
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reg = <0x1000d800 0x80>,
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<0x1000da00 0x80>,
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<0x1000dc00 0x80>;
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reg-names = "dma",
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"dma-channels",
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"dma-sram";
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_ENETSW_RX_DMA0>,
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<BCM63268_IRQ_ENETSW_TX_DMA0>;
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interrupt-names = "rx",
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"tx";
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clocks = <&periph_clk BCM63268_CLK_GMAC>,
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<&periph_clk BCM63268_CLK_ROBOSW>,
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<&periph_clk BCM63268_CLK_ROBOSW250>,
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<&timer_clk BCM63268_TCLK_EPHY1>,
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<&timer_clk BCM63268_TCLK_EPHY2>,
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<&timer_clk BCM63268_TCLK_EPHY3>,
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<&timer_clk BCM63268_TCLK_GPHY1>;
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resets = <&periph_rst BCM63268_RST_ENETSW>,
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<&periph_rst BCM63268_RST_EPHY>,
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<&periph_rst BCM63268_RST_GPHY>;
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power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_ROBOSW>;
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dma-rx = <0>;
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dma-tx = <1>;
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status = "disabled";
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};
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pcie: pcie@106e0000 {
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compatible = "brcm,bcm6328-pcie";
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reg = <0x106e0000 0x10000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x00 0x01>;
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ranges = <0x2000000 0 0x11000000 0x11000000 0 0xf00000>;
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linux,pci-probe-only = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM63268_IRQ_PCIE_RC>;
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clocks = <&periph_clk BCM63268_CLK_PCIE>;
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clock-names = "pcie";
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resets = <&periph_rst BCM63268_RST_PCIE>,
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<&periph_rst BCM63268_RST_PCIE_EXT>,
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<&periph_rst BCM63268_RST_PCIE_CORE>,
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<&periph_rst BCM63268_RST_PCIE_HARD>;
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reset-names = "pcie",
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"pcie-ext",
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"pcie-core",
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"pcie-hard";
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power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_PCIE>;
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brcm,serdes = <&serdes_cntl>;
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status = "disabled";
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};
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switch0: switch@10700000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm63268-switch";
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reg = <0x10700000 0x8000>;
|
|
big-endian;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@8 {
|
|
reg = <8>;
|
|
|
|
phy-mode = "internal";
|
|
ethernet = <ðernet>;
|
|
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
mdio: mdio@107000b0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6368-mdio-mux";
|
|
reg = <0x107000b0 0x8>;
|
|
|
|
mdio_int: mdio@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0>;
|
|
|
|
phy1: ethernet-phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <1>;
|
|
};
|
|
|
|
phy2: ethernet-phy@2 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <2>;
|
|
};
|
|
|
|
phy3: ethernet-phy@3 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <3>;
|
|
};
|
|
|
|
phy4: ethernet-phy@4 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <4>;
|
|
};
|
|
};
|
|
|
|
mdio_ext: mdio@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
};
|
|
};
|
|
};
|
|
};
|