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796815eb53
Some BCM6358 based boards may detect USB2.0 high speed devices as USB1.1 full speed. This is an old well known bug, but nobody cared about it. It is quite random and hard to track. With the latest versions of Openwrt, one user confirmed that the bug is still there (tested router: HG556a). Power cycle the USB PLL to fix it. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
51 lines
1.6 KiB
Diff
51 lines
1.6 KiB
Diff
--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -452,6 +452,23 @@ static struct clk clk_pcie = {
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};
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/*
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+ * NAND clock
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+ */
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+static void nand_set(struct clk *clk, int enable)
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+{
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+ if (BCMCPU_IS_6362())
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+ bcm_hwclock_set(CKCTL_6362_NAND_EN, enable);
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+ else if (BCMCPU_IS_6368())
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+ bcm_hwclock_set(CKCTL_6368_NAND_EN, enable);
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+ else if (BCMCPU_IS_63268())
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+ bcm_hwclock_set(CKCTL_63268_NAND_EN, enable);
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+}
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+
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+static struct clk clk_nand = {
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+ .set = nand_set,
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+};
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+
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+/*
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* Internal peripheral clock
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*/
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static struct clk clk_periph = {
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@@ -648,6 +665,7 @@ static struct clk_lookup bcm6362_clks[]
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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@@ -665,6 +683,7 @@ static struct clk_lookup bcm6368_clks[]
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CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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@@ -683,6 +702,7 @@ static struct clk_lookup bcm63268_clks[]
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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