openwrt/target/linux/ramips/dts/MIR3G.dts
Ozgur Can Leonard 201d3d1a82 ramips: Xiaomi MIR3G: detect board name from DTS
- Former "mir3g" board name becomes "xiaomi,mir3g".
- Reorder some entries to maintain alphabetical order.
- Change DTS so status LEDs (yellow/red/blue) mimic
  Xiaomi stock firmware: (Section Indicator)
<http://files.xiaomi-mi.co.uk/files/router_pro/router%20PRO%20EN.pdf>
<http://files.xiaomi-mi.co.uk/files/Mi_WiFi_router_3/MiWiFi_router3_EN.pdf>
|Yellow: Update (LED flickering), the launch of the system (steady light);
|Blue: during normal operation (steady light);
|Red: Safe mode (display flicker), system failure (steady light);

Signed-off-by: Ozgur Can Leonard <ozgurcan@gmail.com>
[Added link to similar Router 3 model]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2019-03-21 00:57:54 +01:00

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/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir3g", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3G";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_yellow;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x10000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
leds {
compatible = "gpio-leds";
led_status_red: status_red {
label = "mir3g:red:status";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
led_status_blue: status_blue {
label = "mir3g:blue:status";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
led_status_yellow: status_yellow {
label = "mir3g:yellow:status";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
wan_amber {
label = "mir3g:amber:wan";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
};
lan1_amber {
label = "mir3g:amber:lan1";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
lan2_amber {
label = "mir3g:amber:lan2";
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
};
};
button {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&xhci {
vbus-supply = <&reg_usb_vbus>;
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "Config";
reg = <0x80000 0x40000>;
};
partition@c0000 {
label = "Bdata";
reg = <0xc0000 0x40000>;
read-only;
};
factory: partition@100000 {
label = "Factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "crash";
reg = <0x140000 0x40000>;
};
partition@180000 {
label = "crash_syslog";
reg = <0x180000 0x40000>;
};
partition@1c0000 {
label = "reserved0";
reg = <0x1c0000 0x40000>;
read-only;
};
/* uboot expects to find kernels at 0x200000 & 0x600000
* referred to as system 1 & system 2 respectively.
* a kernel is considered suitable for handing control over
* if its linux magic number exists & uImage CRC are correct.
* If either of those conditions fail, a matching sys'n'_fail flag
* is set in uboot env & a restart performed in the hope that the
* alternate kernel is okay.
* if neither kernel checksums ok and both are marked failed, system 2
* is booted anyway.
*
* Note uboot's tftp flash install writes the transferred
* image to both kernel partitions.
*/
partition@200000 {
label = "kernel_stock";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "kernel";
reg = <0x600000 0x400000>;
};
/* ubi partition is the result of squashing
* next consecutive stock partitions:
* - rootfs0 (rootfs partition for stock kernel0),
* - rootfs1 (rootfs partition for stock failsafe kernel1),
* - overlay (used as ubi overlay in stock fw)
* resulting 117,5MiB space for packages.
*/
partition@a00000 {
label = "ubi";
reg = <0xa00000 0x7580000>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&ethernet {
mtd-mac-address = <&factory 0xe000>;
mediatek,portmap = "lwlll";
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "jtag", "uart2", "uart3", "wdt";
ralink,function = "gpio";
};
};
};