openwrt/target/linux/ipq807x/patches-5.15/0118-clk-qcom-Add-WCSSAON-reset.patch
John Audia 67d998e25d
kernel: bump 5.15 to 5.15.145
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.145

No patches needed a rebase.

 23.05 backport:

    Rebased patch mediatek/100-dts-update-mt7622-rfb1.patch due to
    changes introduced in commit e37aa926447f ("arm64: dts: mediatek:
    mt7622: fix memory node warning check") in version v5.15.143 and we
    jumped over from v5.15.139 directly to v5.15.145.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3

 23.05 backport:

  Stijn:
   Compile-tested: ath79/generic, ipq40xx/generic, mvebu/cortexa72, ramips/mt{7621,7620,76x8}, realtek/rtl{838x,930x}, 86/64.
   Run-tested: cortexa72 (RB5009UG+S+IN), mt7621 (EAP615-Wall v1), rtl838x (GS1900-10HP, GS1900-8HP, GS108T v3).

  Petr:
   Compile-tested: ipq807x, mvebu/cortexa9
   Run-tested: turris-omnia, prpl-haze

Tested-by: Stijn Segers <foss@volatilesystems.org> [23.05 testing]
Signed-off-by: John Audia <therealgraysky@proton.me>
Signed-off-by: Petr Štetiar <ynezz@true.cz> [23.05 refresh]
(cherry picked from commit 8de4cc77a6)
2024-01-07 12:57:30 +00:00

26 lines
1.0 KiB
Diff

From 43d9788f546d24df22d8ba3fcc2497d7ccc198f3 Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:11 +0530
Subject: [PATCH] clk: qcom: Add WCSSAON reset
Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/gcc-ipq8074.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/clk/qcom/gcc-ipq8074.c
+++ b/drivers/clk/qcom/gcc-ipq8074.c
@@ -4711,6 +4711,7 @@ static const struct qcom_reset_map gcc_i
[GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
[GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
[GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
+ [GCC_WCSSAON_RESET] = { 0x59010, 0 },
};
static struct gdsc *gcc_ipq8074_gdscs[] = {