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https://github.com/openwrt/openwrt.git
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67d998e25d
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.145
No patches needed a rebase.
23.05 backport:
Rebased patch mediatek/100-dts-update-mt7622-rfb1.patch due to
changes introduced in commit e37aa926447f ("arm64: dts: mediatek:
mt7622: fix memory node warning check") in version v5.15.143 and we
jumped over from v5.15.139 directly to v5.15.145.
Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3
23.05 backport:
Stijn:
Compile-tested: ath79/generic, ipq40xx/generic, mvebu/cortexa72, ramips/mt{7621,7620,76x8}, realtek/rtl{838x,930x}, 86/64.
Run-tested: cortexa72 (RB5009UG+S+IN), mt7621 (EAP615-Wall v1), rtl838x (GS1900-10HP, GS1900-8HP, GS108T v3).
Petr:
Compile-tested: ipq807x, mvebu/cortexa9
Run-tested: turris-omnia, prpl-haze
Tested-by: Stijn Segers <foss@volatilesystems.org> [23.05 testing]
Signed-off-by: John Audia <therealgraysky@proton.me>
Signed-off-by: Petr Štetiar <ynezz@true.cz> [23.05 refresh]
(cherry picked from commit 8de4cc77a6)
80 lines
2.2 KiB
Diff
80 lines
2.2 KiB
Diff
From ff35d239b7b64f71d7dd9d0ce887647de2cacfcc Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Sun, 15 May 2022 23:00:46 +0200
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Subject: [PATCH] clk: qcom: ipq8074: add USB GDSCs
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Add GDSC-s for each of the two USB controllers built-in the IPQ8074.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220515210048.483898-9-robimarko@gmail.com
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---
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drivers/clk/qcom/Kconfig | 1 +
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drivers/clk/qcom/gcc-ipq8074.c | 24 ++++++++++++++++++++++++
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2 files changed, 25 insertions(+)
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--- a/drivers/clk/qcom/Kconfig
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+++ b/drivers/clk/qcom/Kconfig
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@@ -167,6 +167,7 @@ config IPQ_LCC_806X
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config IPQ_GCC_8074
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tristate "IPQ8074 Global Clock Controller"
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+ select QCOM_GDSC
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help
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Support for global clock controller on ipq8074 devices.
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Say Y if you want to use peripheral devices such as UART, SPI,
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -22,6 +22,7 @@
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#include "clk-alpha-pll.h"
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#include "clk-regmap-divider.h"
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#include "clk-regmap-mux.h"
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+#include "gdsc.h"
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#include "reset.h"
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enum {
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@@ -4402,6 +4403,22 @@ static struct clk_branch gcc_pcie0_axi_s
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},
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};
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+static struct gdsc usb0_gdsc = {
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+ .gdscr = 0x3e078,
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+ .pd = {
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+ .name = "usb0_gdsc",
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+ },
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+ .pwrsts = PWRSTS_OFF_ON,
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+};
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+
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+static struct gdsc usb1_gdsc = {
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+ .gdscr = 0x3f078,
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+ .pd = {
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+ .name = "usb1_gdsc",
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+ },
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+ .pwrsts = PWRSTS_OFF_ON,
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+};
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+
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static const struct alpha_pll_config ubi32_pll_config = {
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.l = 0x4e,
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.config_ctl_val = 0x200d4aa8,
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@@ -4805,6 +4822,11 @@ static const struct qcom_reset_map gcc_i
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[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
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};
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+static struct gdsc *gcc_ipq8074_gdscs[] = {
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+ [USB0_GDSC] = &usb0_gdsc,
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+ [USB1_GDSC] = &usb1_gdsc,
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+};
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+
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static const struct of_device_id gcc_ipq8074_match_table[] = {
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{ .compatible = "qcom,gcc-ipq8074" },
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{ }
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@@ -4827,6 +4849,8 @@ static const struct qcom_cc_desc gcc_ipq
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.num_resets = ARRAY_SIZE(gcc_ipq8074_resets),
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.clk_hws = gcc_ipq8074_hws,
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.num_clk_hws = ARRAY_SIZE(gcc_ipq8074_hws),
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+ .gdscs = gcc_ipq8074_gdscs,
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+ .num_gdscs = ARRAY_SIZE(gcc_ipq8074_gdscs),
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};
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static int gcc_ipq8074_probe(struct platform_device *pdev)
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