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120 lines
2.0 KiB
Plaintext
120 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2021 MediaTek Inc.
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* Author: Sam.Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7986a.dtsi"
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#include "mt7986a-zyxel-ex5601-t0-common.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Zyxel EX5601-T0";
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compatible = "zyxel,ex5601-t0", "mediatek,mt7986a-rfb-snand";
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x20000000>;
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};
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};
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&spi_nand {
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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};
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&nand_partitions {
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partition@0 {
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label = "BL2";
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reg = <0x00000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x0200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory: eeprom@0 {
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#size-cells = <1>;
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reg = <0x0 0x1000>;
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};
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macaddr_factory_0004: macaddr@0004 {
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compatible = "mac-base";
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reg = <0x0004 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_0024: macaddr@0024 {
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compatible = "mac-base";
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reg = <0x0024 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_002a: macaddr@002a {
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compatible = "mac-base";
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reg = <0x002a 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x01C0000>;
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read-only;
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};
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partition@540000 {
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label = "zloader";
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reg = <0x540000 0x0040000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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partition@4580000 {
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label = "ubi2";
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reg = <0x4580000 0x4000000>;
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read-only;
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};
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partition@8580000 {
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label = "zyubi";
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reg = <0x8580000 0x15A80000>;
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_002a 0>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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nvmem-cells = <&macaddr_factory_0024 0>;
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nvmem-cell-names = "mac-address";
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};
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&wifi {
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nvmem-cells = <&eeprom_factory>;
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nvmem-cell-names = "eeprom";
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};
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