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2d5ee43dc6
Manually rebased generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch All others updated automatically. Compile-tested on: ramips/mt7621, armvirt/32 Runtime-tested on: ramips/mt7621, armvirt/32 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
63 lines
2.3 KiB
Diff
63 lines
2.3 KiB
Diff
From: Gabor Juhos <juhosg@openwrt.org>
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Subject: debloat: add kernel config option to disabling common PCI quirks
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/pci/Kconfig | 6 ++++++
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drivers/pci/quirks.c | 6 ++++++
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2 files changed, 12 insertions(+)
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--- a/drivers/pci/Kconfig
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+++ b/drivers/pci/Kconfig
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@@ -115,6 +115,13 @@ config XEN_PCIDEV_FRONTEND
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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+config PCI_DISABLE_COMMON_QUIRKS
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+ bool "PCI disable common quirks"
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+ depends on PCI
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+ help
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+ If you don't know what to do here, say N.
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+
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+
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config PCI_ATS
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bool
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
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DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
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+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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/*
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* The Mellanox Tavor device gives false positive parity errors. Mark this
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* device with a broken_parity_status to allow PCI scanning code to "skip"
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@@ -3321,6 +3322,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
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+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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+
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/*
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* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
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* To work around this, query the size it should be configured to by the
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@@ -3346,6 +3349,8 @@ static void quirk_intel_ntb(struct pci_d
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
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+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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+
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/*
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* Some BIOS implementations leave the Intel GPU interrupts enabled, even
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* though no one is handling them (e.g., if the i915 driver is never
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@@ -3384,6 +3389,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
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+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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+
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/*
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* PCI devices which are on Intel chips can skip the 10ms delay
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* before entering D3 mode.
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