openwrt/target/linux/ramips/dts/mt7620a_engenius_esr600.dts
Michael Pratt 5cd44a0cfa ramips: mt7620: simplify DTS properties for GMAC
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:

  EPHY mode (RJ-45, internal PHY)
  GMAC mode (RGMII, external PHY)

Let the DTS property be boolean instead of string
where EPHY mode is the default.

Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
Signed-off-by: maurerr <mariusd84@gmail.com>
2021-09-01 08:08:15 +00:00

193 lines
3.0 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "engenius,esr600", "ralink,mt7620a-soc";
model = "EnGenius ESR600";
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "amber:power";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
wps2g {
label = "amber:wps2g";
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
};
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
iNIC_rf: partition@50000 {
label = "iNIC_rf";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
label = "firmware";
reg = <0x60000 0xf40000>;
compatible = "denx,uimage";
};
partition@fa0000 {
label = "backup";
reg = <0xfa0000 0x10000>;
read-only;
};
partition@fb0000 {
label = "storage";
reg = <0xfb0000 0x50000>;
read-only;
};
};
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &mdio_pins>;
mtd-mac-address = <&iNIC_rf 0x4>;
port@5 {
status = "okay";
phy-mode = "rgmii";
mediatek,fixed-link = <1000 1 1 1>;
};
mdio-bus {
status = "okay";
mediatek,mdio-mode;
ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x10 0x40000000 /* POWER-ON STRAPPING */
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0 STATUS */
0x0c 0x05600000 /* PORT6 PAD MODE CTRL */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
};
&state_default {
gpio {
groups = "i2c", "uartf", "nd_sd", "wled";
function = "gpio";
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci1814,5592";
reg = <0x0 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x0>;
};
};
&wmac {
ralink,mtd-eeprom = <&iNIC_rf 0x0>;
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};