openwrt/target/linux/ath79/dts/ar9331_dragino_ms14.dts
Mathias Kresin 0ff5785c5d ath79: fix dts files
Add the SoC compatible to the individual dts files. Rename the dts files
to match the common pattern.

Remove dts files wich aren't used and no image in ar71xx exists.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-05-17 07:40:19 +02:00

104 lines
1.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9331.dtsi"
/ {
model = "Dragino MS14 (Dragino 2)";
compatible = "dragino,ms14", "qca,ar9331";
aliases {
serial0 = &uart;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
leds {
compatible = "gpio-leds";
wlan {
label = "dragino2:red:wlan";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
lan {
label = "dragino2:red:lan";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
default-state = "off";
};
wan {
label = "dragino2:red:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
default-state = "off";
};
system {
label = "dragino2:red:system";
gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
label = "jumpstart";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
};
&ref {
clock-frequency = <25000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&usb {
dr_mode = "host";
status = "okay";
};
&usb_phy {
status = "okay";
};
&spi {
num-chipselects = <1>;
status = "okay";
/* Winbond 25Q128BVFG SPI flash */
spiflash: w25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128", "jedec,spi-nor";
spi-max-frequency = <104000000>;
reg = <0>;
};
};