mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 23:12:32 +00:00
ca5c695a45
Deleted following upstreamed patches: bcm27xx: 950-0006-drm-vc4-hdmi-Fix-HPD-GPIO-detection.patch bcm27xx: 950-0420-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx: 950-0425-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx: 950-0432-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx: 950-0433-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx: 950-0435-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx: 950-0436-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx: 950-0437-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx: 950-0438-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx: 950-0443-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx: 950-0445-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch bcm27xx: 950-0475-drm-vc4-Reset-HDMI-MISC_CONTROL-register.patch bcm27xx: 950-0476-drm-vc4-Release-workaround-buffer-and-DMA-in-error-p.patch bcm27xx: 950-0477-drm-vc4-Correct-DSI-divider-calculations.patch bcm27xx: 950-0664-drm-vc4-dsi-Correct-max-divider-to-255-not-7.patch bcm53xx: 072-next-ARM_dts_BCM53015-add-mr26.patch mediatek: 920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch Manually rebased following patches: bcm27xx: 950-0004-drm-vc4-hdmi-Remove-the-DDC-probing-for-status-detec.patch bcm27xx: 950-0700-net-phy-lan87xx-Decrease-phy-polling-rate.patch bcm27xx: 950-0711-drm-vc4-Rename-bridge-to-out_bridge.patch bcm27xx: 950-0713-drm-vc4-Remove-splitting-the-bridge-chain-from-the-d.patch bcm27xx: 950-0715-drm-vc4-Convert-vc4_dsi-to-using-a-bridge-instead-of.patch bcm27xx: 950-0787-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch bcm27xx: 950-0914-mmc-block-Don-t-do-single-sector-reads-during-recove.patch Runtime tested on turris-omnia and glinet-b1300. Tested-by: John Audia <therealgraysky@proton.me> [bcm2711/RPi4B, mt7622/RT3200] Signed-off-by: Petr Štetiar <ynezz@true.cz>
341 lines
7.6 KiB
Diff
341 lines
7.6 KiB
Diff
From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001
|
|
From: Matthew Hagan <mnhagan88@gmail.com>
|
|
Date: Fri, 6 Aug 2021 21:44:34 +0100
|
|
Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series
|
|
|
|
MX64 & MX64W Hardware info:
|
|
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
|
|
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
|
|
- Storage: 1 GB (Micron MT29F8G08ABACA)
|
|
- Networking: BCM58625 internal switch (5x 1GbE ports)
|
|
- USB: 1x USB2.0
|
|
- Serial: Internal header
|
|
- WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
|
|
|
|
This patch adds the Meraki MX64 series-specific bindings. Since some
|
|
devices make use of the older A0 SoC, changes need to be made to
|
|
accommodate this case, including removal of coherency options and
|
|
modification to the secondary-boot-reg.
|
|
|
|
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
|
|
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
---
|
|
arch/arm/boot/dts/Makefile | 4 +
|
|
.../boot/dts/bcm958625-meraki-kingpin.dtsi | 163 ++++++++++++++++++
|
|
.../arm/boot/dts/bcm958625-meraki-mx64-a0.dts | 25 +++
|
|
arch/arm/boot/dts/bcm958625-meraki-mx64.dts | 24 +++
|
|
.../boot/dts/bcm958625-meraki-mx64w-a0.dts | 33 ++++
|
|
arch/arm/boot/dts/bcm958625-meraki-mx64w.dts | 32 ++++
|
|
6 files changed, 281 insertions(+)
|
|
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
|
|
|
|
--- a/arch/arm/boot/dts/Makefile
|
|
+++ b/arch/arm/boot/dts/Makefile
|
|
@@ -158,6 +158,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
|
|
bcm958525xmc.dtb \
|
|
bcm958622hr.dtb \
|
|
bcm958623hr.dtb \
|
|
+ bcm958625-meraki-mx64.dtb \
|
|
+ bcm958625-meraki-mx64-a0.dtb \
|
|
+ bcm958625-meraki-mx64w.dtb \
|
|
+ bcm958625-meraki-mx64w-a0.dtb \
|
|
bcm958625hr.dtb \
|
|
bcm988312hr.dtb \
|
|
bcm958625k.dtb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
|
|
@@ -0,0 +1,163 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
|
|
+ *
|
|
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
|
|
+ */
|
|
+
|
|
+#include "bcm958625-meraki-mx6x-common.dtsi"
|
|
+
|
|
+/ {
|
|
+
|
|
+ keys {
|
|
+ compatible = "gpio-keys-polled";
|
|
+ autorepeat;
|
|
+ poll-interval = <20>;
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ compatible = "gpio-leds";
|
|
+
|
|
+ led-0 {
|
|
+ /* green:lan1-left */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <0>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-1 {
|
|
+ /* green:lan1-right */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <1>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-2 {
|
|
+ /* green:lan2-left */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <2>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-3 {
|
|
+ /* green:lan2-right */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <3>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-4 {
|
|
+ /* green:lan3-left */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <4>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-5 {
|
|
+ /* green:lan3-right */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <5>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-6 {
|
|
+ /* green:lan4-left */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <6>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-7 {
|
|
+ /* green:lan4-right */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <7>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-8 {
|
|
+ /* green:wan-left */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <8>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-9 {
|
|
+ /* green:wan-right */
|
|
+ function = LED_FUNCTION_ACTIVITY;
|
|
+ function-enumerator = <9>;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ led-a {
|
|
+ /* amber:power */
|
|
+ function = LED_FUNCTION_POWER;
|
|
+ color = <LED_COLOR_ID_AMBER>;
|
|
+ gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "on";
|
|
+ };
|
|
+
|
|
+ led-b {
|
|
+ /* white:status */
|
|
+ function = LED_FUNCTION_STATUS;
|
|
+ color = <LED_COLOR_ID_WHITE>;
|
|
+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&srab {
|
|
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
|
|
+ status = "okay";
|
|
+
|
|
+ ports {
|
|
+ port@0 {
|
|
+ label = "lan1";
|
|
+ reg = <0>;
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ label = "lan2";
|
|
+ reg = <1>;
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ label = "lan3";
|
|
+ reg = <2>;
|
|
+ };
|
|
+
|
|
+ port@3 {
|
|
+ label = "lan4";
|
|
+ reg = <3>;
|
|
+ };
|
|
+
|
|
+ port@4 {
|
|
+ label = "wan";
|
|
+ reg = <4>;
|
|
+ };
|
|
+
|
|
+ port@8 {
|
|
+ ethernet = <&amac2>;
|
|
+ reg = <8>;
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
|
|
@@ -0,0 +1,25 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC.
|
|
+ *
|
|
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm958625-meraki-kingpin.dtsi"
|
|
+#include "bcm-nsp-ax.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Cisco Meraki MX64(A0)";
|
|
+ compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp";
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ memory@60000000 {
|
|
+ device_type = "memory";
|
|
+ reg = <0x60000000 0x80000000>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts
|
|
@@ -0,0 +1,24 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC.
|
|
+ *
|
|
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm958625-meraki-kingpin.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Cisco Meraki MX64";
|
|
+ compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ memory@60000000 {
|
|
+ device_type = "memory";
|
|
+ reg = <0x60000000 0x80000000>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
|
|
@@ -0,0 +1,33 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
|
|
+ *
|
|
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm958625-meraki-kingpin.dtsi"
|
|
+#include "bcm-nsp-ax.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Cisco Meraki MX64W(A0)";
|
|
+ compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ memory@60000000 {
|
|
+ device_type = "memory";
|
|
+ reg = <0x60000000 0x80000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie1 {
|
|
+ status = "okay";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
|
|
@@ -0,0 +1,32 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC.
|
|
+ *
|
|
+ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm958625-meraki-kingpin.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Cisco Meraki MX64W";
|
|
+ compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ memory@60000000 {
|
|
+ device_type = "memory";
|
|
+ reg = <0x60000000 0x80000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie1 {
|
|
+ status = "okay";
|
|
+};
|