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Currently, IPQ807x is using CPUFreq NVMEM for dealing with different SoC SKU-s having different frequency limits, and we are keeping the patches for it in ipq807x target. However, we managed to upstream a big cleanup of the driver in order to make it possible for other SMEM based targets to be added to CPUFreq NVMEM. IPQ806x will be using CPUFreq NVMEM and depends on these changes as well, so lets put them in generic backport to avoid code duplication. This replaces the older patches in ipq807x. Signed-off-by: Robert Marko <robimarko@gmail.com>
52 lines
1.4 KiB
Diff
52 lines
1.4 KiB
Diff
From 2b8634d1468ff498cc91b6adf993c27ae6fa079d Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 26 May 2023 22:48:01 +0200
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Subject: [PATCH] cpufreq: qcom-nvmem: use SoC ID-s from bindings
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SMEM SoC ID-s are now stored in DT bindings so lets use those instead of
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defining them in the driver again.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20230526204802.3081168-4-robimarko@gmail.com
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---
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drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++----------
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1 file changed, 5 insertions(+), 10 deletions(-)
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--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
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+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
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@@ -31,12 +31,7 @@
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#define MSM_ID_SMEM 137
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-enum _msm_id {
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- MSM8996V3 = 0xF6ul,
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- APQ8096V3 = 0x123ul,
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- MSM8996SG = 0x131ul,
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- APQ8096SG = 0x138ul,
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-};
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+#include <dt-bindings/arm/qcom,ids.h>
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enum _msm8996_version {
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MSM8996_V3,
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@@ -154,12 +149,12 @@ static enum _msm8996_version qcom_cpufre
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msm_id++;
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switch ((enum _msm_id)*msm_id) {
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- case MSM8996V3:
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- case APQ8096V3:
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+ case QCOM_ID_MSM8996:
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+ case QCOM_ID_APQ8096:
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version = MSM8996_V3;
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break;
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- case MSM8996SG:
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- case APQ8096SG:
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+ case QCOM_ID_MSM8996SG:
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+ case QCOM_ID_APQ8096SG:
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version = MSM8996_SG;
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break;
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default:
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