openwrt/target/linux/bcm27xx/patches-5.15/950-0554-media-i2c-imx477-Add-vsync-trigger_mode-parameter.patch
Álvaro Fernández Rojas 20ea6adbf1 bcm27xx: add support for linux v5.15
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B

Signed-off-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2022-05-17 15:11:22 +02:00

65 lines
2.2 KiB
Diff

From 9ed9132402b92d1957927c8719f37d8b95bb00ff Mon Sep 17 00:00:00 2001
From: neocortex-vision <oss@neocortexvision.com>
Date: Thu, 28 Oct 2021 17:37:36 +0100
Subject: [PATCH] media: i2c: imx477: Add vsync trigger_mode parameter
trigger_mode == 0 (default) => no effect / no registers written
trigger_mode == 1 => source
trigger_mode == 2 => sink
This can be set e.g. in /boot/cmdline.txt as imx477.trigger_mode=N
Signed-off-by: Jonas Jacob <jonas.jacob@neocortexvision.com>
---
drivers/media/i2c/imx477.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
--- a/drivers/media/i2c/imx477.c
+++ b/drivers/media/i2c/imx477.c
@@ -25,6 +25,10 @@ static int dpc_enable = 1;
module_param(dpc_enable, int, 0644);
MODULE_PARM_DESC(dpc_enable, "Enable on-sensor DPC");
+static int trigger_mode;
+module_param(trigger_mode, int, 0644);
+MODULE_PARM_DESC(trigger_mode, "Set vsync trigger mode: 1=source, 2=sink");
+
#define IMX477_REG_VALUE_08BIT 1
#define IMX477_REG_VALUE_16BIT 2
@@ -98,6 +102,12 @@ MODULE_PARM_DESC(dpc_enable, "Enable on-
#define IMX477_TEST_PATTERN_B_DEFAULT 0
#define IMX477_TEST_PATTERN_GB_DEFAULT 0
+/* Trigger mode */
+#define IMX477_REG_MC_MODE 0x3f0b
+#define IMX477_REG_MS_SEL 0x3041
+#define IMX477_REG_XVS_IO_CTRL 0x3040
+#define IMX477_REG_EXTOUT_EN 0x4b81
+
/* Embedded metadata stream structure */
#define IMX477_EMBEDDED_LINE_WIDTH 16384
#define IMX477_NUM_EMBEDDED_LINES 1
@@ -1721,6 +1731,21 @@ static int imx477_start_streaming(struct
imx477_write_reg(imx477, 0x0b05, IMX477_REG_VALUE_08BIT, !!dpc_enable);
imx477_write_reg(imx477, 0x0b06, IMX477_REG_VALUE_08BIT, !!dpc_enable);
+ /* Set vsync trigger mode */
+ if (trigger_mode != 0) {
+ /* trigger_mode == 1 for source, 2 for sink */
+ const u32 val = (trigger_mode == 1) ? 1 : 0;
+
+ imx477_write_reg(imx477, IMX477_REG_MC_MODE,
+ IMX477_REG_VALUE_08BIT, 1);
+ imx477_write_reg(imx477, IMX477_REG_MS_SEL,
+ IMX477_REG_VALUE_08BIT, val);
+ imx477_write_reg(imx477, IMX477_REG_XVS_IO_CTRL,
+ IMX477_REG_VALUE_08BIT, val);
+ imx477_write_reg(imx477, IMX477_REG_EXTOUT_EN,
+ IMX477_REG_VALUE_08BIT, val);
+ }
+
/* Apply customized values from user */
ret = __v4l2_ctrl_handler_setup(imx477->sd.ctrl_handler);
if (ret)