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https://github.com/openwrt/openwrt.git
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87 lines
3.2 KiB
Diff
87 lines
3.2 KiB
Diff
From 099581aeb11b7eafbca02c9e69f6e6c8de0c57ec Mon Sep 17 00:00:00 2001
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From: P33M <P33M@github.com>
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Date: Fri, 20 Jun 2014 17:23:20 +0100
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Subject: [PATCH 046/114] fiq_fsm: Implement hack for Split Interrupt
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transactions
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Hubs aren't too picky about which endpoint we send Control type split
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transactions to. By treating Interrupt transfers as Control, it is
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possible to use the non-periodic queue in the OTG core as well as the
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non-periodic FIFOs in the hub itself. This massively reduces the
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microframe exclusivity/contention that periodic split transactions
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otherwise have to enforce.
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It goes without saying that this is a fairly egregious USB specification
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violation, but it works.
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Original idea by Hans Petter Selasky @ FreeBSD.org.
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---
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drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 32 ++++++++++++++++++++++++++------
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1 file changed, 26 insertions(+), 6 deletions(-)
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--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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@@ -1055,10 +1055,11 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd
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for (i=0; i < hcd->core_if->core_params->host_channels; i++) {
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dwc_otg_cleanup_fiq_channel(hcd, i);
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}
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- DWC_PRINTF("FIQ FSM acceleration enabled for :\n%s%s%s",
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+ DWC_PRINTF("FIQ FSM acceleration enabled for :\n%s%s%s%s",
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(fiq_fsm_mask & 0x1) ? "Non-periodic Split Transactions\n" : "",
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(fiq_fsm_mask & 0x2) ? "Periodic Split Transactions\n" : "",
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- (fiq_fsm_mask & 0x4) ? "High-Speed Isochronous Endpoints\n" : "");
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+ (fiq_fsm_mask & 0x4) ? "High-Speed Isochronous Endpoints\n" : "",
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+ (fiq_fsm_mask & 0x8) ? "Interrupt/Control Split Transaction hack enabled\n" : "");
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}
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}
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@@ -1789,6 +1790,20 @@ int fiq_fsm_queue_split_transaction(dwc_
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st->hcintmsk_copy.b.chhltd = 1;
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st->hcintmsk_copy.b.ahberr = 1;
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+ /* Hack courtesy of FreeBSD: apparently forcing Interrupt Split transactions
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+ * as Control puts the transfer into the non-periodic request queue and the
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+ * non-periodic handler in the hub. Makes things lots easier.
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+ */
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+ if ((fiq_fsm_mask & 0x8) && hc->ep_type == UE_INTERRUPT) {
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+ st->hcchar_copy.b.multicnt = 0;
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+ st->hcchar_copy.b.oddfrm = 0;
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+ st->hcchar_copy.b.eptype = UE_CONTROL;
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+ if (hc->align_buff) {
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+ st->hcdma_copy.d32 = hc->align_buff;
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+ } else {
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+ st->hcdma_copy.d32 = ((unsigned long) hc->xfer_buff & 0xFFFFFFFF);
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+ }
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+ }
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DWC_WRITE_REG32(&hc_regs->hcdma, st->hcdma_copy.d32);
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DWC_WRITE_REG32(&hc_regs->hctsiz, st->hctsiz_copy.d32);
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DWC_WRITE_REG32(&hc_regs->hcsplt, st->hcsplt_copy.d32);
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@@ -1842,6 +1857,9 @@ int fiq_fsm_queue_split_transaction(dwc_
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}
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}
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}
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+ if ((fiq_fsm_mask & 0x8) && hc->ep_type == UE_INTERRUPT)
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+ start_immediate = 1;
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+
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fiq_print(FIQDBG_INT, hcd->fiq_state, "FSMQ %01d %01d", hc->hc_num, start_immediate);
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fiq_print(FIQDBG_INT, hcd->fiq_state, "%08d", hfnum.b.frrem);
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//fiq_print(FIQDBG_INT, hcd->fiq_state, "H:%02dP:%02d", hub_addr, port_addr);
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@@ -1873,11 +1891,13 @@ int fiq_fsm_queue_split_transaction(dwc_
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}
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break;
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case UE_INTERRUPT:
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- if (start_immediate) {
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+ if (fiq_fsm_mask & 0x8) {
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+ st->fsm = FIQ_NP_SSPLIT_STARTED;
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+ } else if (start_immediate) {
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st->fsm = FIQ_PER_SSPLIT_STARTED;
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- } else {
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- st->fsm = FIQ_PER_SSPLIT_QUEUED;
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- }
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+ } else {
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+ st->fsm = FIQ_PER_SSPLIT_QUEUED;
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+ }
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default:
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break;
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}
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