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https://github.com/openwrt/openwrt.git
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59c2f9eaad
Technicolor TG582n has a similar PCB as the OpenWrt's ADB P.DG A4001N1 with LEDs connected to different GPIO PINs in active low configuration. Hardware: * Board ID: DANT-1 * SoC: Broadcom BCM6328 (rev b0) @ 320MHz, CPU BMIPS4350 * RAM DDR2: 64 Mbyte - Winbond W9751G6KB-25 * Serial flash: 16 Mbyte - MXIC MX25L6445EMI * Ethernet: 4x Ethernet 10/100 baseT * Wifi 2.4GHz: Broadcom Corporation BCM43227 Wireless Network Adapter (rev 30) * LEDs: 2x Power, 1x Ethernet, 1x Broadband, 2x Wi-Fi, 2x WPS, 4x ethernet * Buttons: 1x Reset, 1x WPS, 1x WiFi * UART: 1x TTL 115200n8, VCC GND TX RX, on J3 connector (short R62 and R63) Installation via CFE: * Stock CFE has to be overwritten with a generic 6328 one that can upload .bin images with no signature check (cfe6328_configured.bin) * Connect a serial port to the board * Stop the CFE boot process after power on by pressing enter * Set static IP 192.168.2.10 and subnet mask 255.255.255.0 * Navigate to http://192.168.2.50/ * Upload the OpenWrt image file PCB: |GPIO: |TG582n: LED2R |488(08) |red Power LED2G |484(04) |green Power LED10R |486(06) | LED13G |485(05) |green Ethernet LED11R |494(14) | LED14G |491(11) |green Broadband LED5R |487(07) |red Internet LED5G |481(01) |green Internet LED12R |498(18) | LED12G |499(19) | LED6R |482(02) |red Wi-Fi LED6G |483(03) |green Wi-Fi LED7R |490(10) |red WPS LED7G |489(09) |green WPS LED4 |508(28) |ethernet port 4 LED3 |507(27) |ethernet port 3 LED9 |506(26) |ethernet port 2 LED8 |505(25) |ethernet port 1 SW3 |503(23) |key Reset SW5 |504(24) |key WPS SW4 |495(15) |key Wi-Fi SW6 |493(13) | SW1 |492(12) | Signed-off-by: Daniele Castro <danielecastro@hotmail.it> [Fix base-files, refresh patch] Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
658 lines
13 KiB
Diff
658 lines
13 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -348,6 +348,611 @@ static struct board_info __initdata boar
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},
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},
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};
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+
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+static struct board_info __initdata board_963281TAN = {
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+ .name = "963281TAN",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+};
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+
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+static struct board_info __initdata board_A4001N = {
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+ .name = "96328dg2x2",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43225,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ },
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+};
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+
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+static struct board_info __initdata board_A4001N1 = {
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+ .name = "963281T_TEF",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43225,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ },
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+};
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+
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+static struct sprom_fixup __initdata ad1018_fixups[] = {
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+ { .offset = 6, .value = 0x1c00 },
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+ { .offset = 65, .value = 0x1256 },
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+ { .offset = 96, .value = 0x2046 },
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+ { .offset = 97, .value = 0xfe69 },
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+ { .offset = 98, .value = 0x1726 },
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+ { .offset = 99, .value = 0xfa5c },
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+ { .offset = 112, .value = 0x2046 },
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+ { .offset = 113, .value = 0xfea8 },
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+ { .offset = 114, .value = 0x1978 },
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+ { .offset = 115, .value = 0xfa26 },
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+ { .offset = 161, .value = 0x2222 },
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+ { .offset = 169, .value = 0x2222 },
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+ { .offset = 171, .value = 0x2222 },
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+ { .offset = 173, .value = 0x2222 },
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+ { .offset = 174, .value = 0x4444 },
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+ { .offset = 175, .value = 0x2222 },
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+ { .offset = 176, .value = 0x4444 },
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+};
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+
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+static struct board_info __initdata board_AD1018 = {
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+ .name = "96328avngr",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "FIBRE",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "LAN3",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "LAN2",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "LAN1",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43217,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ .board_fixups = ad1018_fixups,
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+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
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+ },
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+};
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+
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+static struct sprom_fixup __initdata ar5381u_fixups[] = {
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+ { .offset = 97, .value = 0xfee5 },
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+ { .offset = 98, .value = 0x157c },
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+ { .offset = 99, .value = 0xfae7 },
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+ { .offset = 113, .value = 0xfefa },
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+ { .offset = 114, .value = 0x15d6 },
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+ { .offset = 115, .value = 0xfaf8 },
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+};
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+
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+static struct board_info __initdata board_AR5381u = {
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+ .name = "96328A-1241N",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43225,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ .board_fixups = ar5381u_fixups,
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+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
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+ },
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+};
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+
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+static struct sprom_fixup __initdata ar5387un_fixups[] = {
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+ { .offset = 2, .value = 0x05bb },
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+ { .offset = 65, .value = 0x1204 },
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+ { .offset = 78, .value = 0x0303 },
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+ { .offset = 79, .value = 0x0202 },
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+ { .offset = 80, .value = 0xff02 },
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+ { .offset = 87, .value = 0x0315 },
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+ { .offset = 88, .value = 0x0315 },
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+ { .offset = 96, .value = 0x2048 },
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+ { .offset = 97, .value = 0xff11 },
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+ { .offset = 98, .value = 0x1567 },
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+ { .offset = 99, .value = 0xfb24 },
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+ { .offset = 100, .value = 0x3e3c },
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+ { .offset = 101, .value = 0x4038 },
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+ { .offset = 102, .value = 0xfe7f },
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+ { .offset = 103, .value = 0x1279 },
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+ { .offset = 112, .value = 0x2048 },
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+ { .offset = 113, .value = 0xff03 },
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+ { .offset = 114, .value = 0x154c },
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+ { .offset = 115, .value = 0xfb27 },
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+ { .offset = 116, .value = 0x3e3c },
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+ { .offset = 117, .value = 0x4038 },
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+ { .offset = 118, .value = 0xfe87 },
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+ { .offset = 119, .value = 0x1233 },
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+ { .offset = 203, .value = 0x2226 },
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+};
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+
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+static struct board_info __initdata board_AR5387un = {
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+ .name = "96328A-1441N1",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43225,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ .board_fixups = ar5387un_fixups,
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+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
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+ },
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+};
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+
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+static struct board_info __initdata board_dsl_274xb_f1 = {
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+ .name = "AW4339U",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+
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+ .has_caldata = 1,
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+ .caldata = {
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+ {
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+ .vendor = PCI_VENDOR_ID_ATHEROS,
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+ .caldata_offset = 0x7d1000,
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+ .slot = 0,
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+ .led_pin = -1,
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+ .led_active_high = 1,
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+ },
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+ },
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 4",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 3",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 2",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 1",
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+ },
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+ },
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+ },
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+};
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+
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+static struct board_info __initdata board_FAST2704V2 = {
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+ .name = "F@ST2704V2",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .has_usbd = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+};
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+
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+static struct board_info __initdata board_PDG_A4001N_A_000_1A1_AX = {
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+ .name = "96328avng",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43225,
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+ .pci_bus = 1,
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+ .pci_dev = 0,
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+ },
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+};
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+
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+static struct board_info __initdata board_PDG_A4101N_A_000_1A1_AE = {
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+ .name = "96328avngv",
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+ .expected_cpu_id = 0x6328,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 1,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "Port 1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "Port 2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "Port 3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "Port 4",
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+ },
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+ },
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+ },
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+
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+ .use_fallback_sprom = 1,
|
|
+ .fallback_sprom = {
|
|
+ .type = SPROM_BCM43225,
|
|
+ .pci_bus = 1,
|
|
+ .pci_dev = 0,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct board_info __initdata board_R5010UNV2 = {
|
|
+ .name = "96328ang",
|
|
+ .expected_cpu_id = 0x6328,
|
|
+
|
|
+ .has_pci = 1,
|
|
+ .has_ohci0 = 1,
|
|
+ .has_ehci0 = 1,
|
|
+ .num_usbh_ports = 1,
|
|
+
|
|
+ .has_enetsw = 1,
|
|
+ .enetsw = {
|
|
+ .used_ports = {
|
|
+ [0] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 1,
|
|
+ .name = "Port 1",
|
|
+ },
|
|
+ [1] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 2,
|
|
+ .name = "Port 2",
|
|
+ },
|
|
+ [2] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 3,
|
|
+ .name = "Port 3",
|
|
+ },
|
|
+ [3] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 4,
|
|
+ .name = "Port 4",
|
|
+ },
|
|
+ },
|
|
+ },
|
|
+
|
|
+ .use_fallback_sprom = 1,
|
|
+ .fallback_sprom = {
|
|
+ .type = SPROM_BCM43217,
|
|
+ .pci_bus = 1,
|
|
+ .pci_dev = 0,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct board_info __initdata board_TG582N = {
|
|
+ .name = "DANT-1",
|
|
+ .expected_cpu_id = 0x6328,
|
|
+
|
|
+ .has_pci = 1,
|
|
+ .has_ohci0 = 1,
|
|
+ .has_ehci0 = 1,
|
|
+ .num_usbh_ports = 1,
|
|
+
|
|
+ .has_enetsw = 1,
|
|
+ .enetsw = {
|
|
+ .used_ports = {
|
|
+ [0] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 1,
|
|
+ .name = "Port 1",
|
|
+ },
|
|
+ [1] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 2,
|
|
+ .name = "Port 2",
|
|
+ },
|
|
+ [2] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 3,
|
|
+ .name = "Port 3",
|
|
+ },
|
|
+ [3] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 4,
|
|
+ .name = "Port 4",
|
|
+ },
|
|
+ },
|
|
+ },
|
|
+
|
|
+ .use_fallback_sprom = 1,
|
|
+ .fallback_sprom = {
|
|
+ .type = SPROM_BCM43225,
|
|
+ .pci_bus = 1,
|
|
+ .pci_dev = 0,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct board_info __initdata board_TG582N_TELECOM_ITALIA = {
|
|
+ .name = "DANT-V",
|
|
+ .expected_cpu_id = 0x6328,
|
|
+
|
|
+ .has_pci = 1,
|
|
+ .has_ohci0 = 1,
|
|
+ .has_ehci0 = 1,
|
|
+ .num_usbh_ports = 1,
|
|
+
|
|
+ .has_enetsw = 1,
|
|
+ .enetsw = {
|
|
+ .used_ports = {
|
|
+ [0] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 1,
|
|
+ .name = "Port 1",
|
|
+ },
|
|
+ [1] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 2,
|
|
+ .name = "Port 2",
|
|
+ },
|
|
+ [2] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 3,
|
|
+ .name = "Port 3",
|
|
+ },
|
|
+ [3] = {
|
|
+ .used = 1,
|
|
+ .phy_id = 4,
|
|
+ .name = "Port 4",
|
|
+ },
|
|
+ },
|
|
+ },
|
|
+
|
|
+ .use_fallback_sprom = 1,
|
|
+ .fallback_sprom = {
|
|
+ .type = SPROM_BCM43225,
|
|
+ .pci_bus = 1,
|
|
+ .pci_dev = 0,
|
|
+ },
|
|
+};
|
|
#endif /* CONFIG_BCM63XX_CPU_6328 */
|
|
|
|
/*
|
|
@@ -703,6 +1308,19 @@ static const struct board_info __initcon
|
|
#endif /* CONFIG_BCM63XX_CPU_6318 */
|
|
#ifdef CONFIG_BCM63XX_CPU_6328
|
|
&board_96328avng,
|
|
+ &board_963281TAN,
|
|
+ &board_A4001N,
|
|
+ &board_A4001N1,
|
|
+ &board_AD1018,
|
|
+ &board_AR5381u,
|
|
+ &board_AR5387un,
|
|
+ &board_dsl_274xb_f1,
|
|
+ &board_FAST2704V2,
|
|
+ &board_PDG_A4001N_A_000_1A1_AX,
|
|
+ &board_PDG_A4101N_A_000_1A1_AE,
|
|
+ &board_TG582N,
|
|
+ &board_TG582N_TELECOM_ITALIA,
|
|
+ &board_R5010UNV2,
|
|
#endif /* CONFIG_BCM63XX_CPU_6328 */
|
|
#ifdef CONFIG_BCM63XX_CPU_6338
|
|
&board_96338gw,
|
|
@@ -742,7 +1360,22 @@ static struct of_device_id const bcm963x
|
|
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
|
|
#endif /* CONFIG_BCM63XX_CPU_6318 */
|
|
#ifdef CONFIG_BCM63XX_CPU_6328
|
|
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
|
|
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
|
|
+ { .compatible = "adb,pdg-a4001n-a-000-1a1-ax", .data = &board_PDG_A4001N_A_000_1A1_AX, },
|
|
+ { .compatible = "adb,pdg-a4101n-a-000-1a1-ae", .data = &board_PDG_A4101N_A_000_1A1_AE, },
|
|
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
|
|
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
|
|
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
|
|
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
|
|
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
|
|
+ { .compatible = "d-link,dsl-2750u-c1", .data = &board_A4001N, },
|
|
+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
|
|
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
|
|
+ { .compatible = "sercomm,ad1018", .data = &board_AD1018, },
|
|
+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
|
|
+ { .compatible = "technicolor,tg582n", .data = &board_TG582N, },
|
|
+ { .compatible = "technicolor,tg582n-telecom-italia", .data = &board_TG582N_TELECOM_ITALIA, },
|
|
#endif /* CONFIG_BCM63XX_CPU_6328 */
|
|
#ifdef CONFIG_BCM63XX_CPU_6338
|
|
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
|