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This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
302 lines
7.7 KiB
Diff
302 lines
7.7 KiB
Diff
From ae23894bcb163d1f91483b9566dc077f1e863af6 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Tue, 23 Jul 2013 08:44:00 -0300
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Subject: [PATCH 064/203] ARM: kirkwood: Relocate PCIe device tree nodes
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Now that mbus has been added to the device tree, it's possible to
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move the PCIe nodes out of the ocp node, placing it directly
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below the mbus. This is a more accurate representation of the hardware.
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Moving the PCIe nodes, we now need to introduce an extra cell to
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encode the window target ID and attribute. Since this depends on
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the PCIe port, we split the ranges translation entries, to
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correspond to each MBus window.
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In addition, we encode the PCIe memory and I/O apertures in the MBus
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node, according to the MBus DT binding specification. The choice made
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is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for
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I/O space. These apertures can be changed in each per-board DT file.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Andrew Lunn <andrew@lunn.ch>
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Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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---
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arch/arm/boot/dts/kirkwood-6281.dtsi | 35 ++++++++++++++
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arch/arm/boot/dts/kirkwood-6282.dtsi | 55 ++++++++++++++++++++++
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arch/arm/boot/dts/kirkwood-iconnect.dts | 11 +++++
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arch/arm/boot/dts/kirkwood-mplcec4.dts | 11 +++++
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.../boot/dts/kirkwood-netgear_readynas_duo_v2.dts | 11 +++++
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arch/arm/boot/dts/kirkwood-nsa310.dts | 19 ++++----
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arch/arm/boot/dts/kirkwood-ts219-6282.dts | 19 ++++----
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arch/arm/boot/dts/kirkwood-ts219.dtsi | 10 ++++
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arch/arm/boot/dts/kirkwood.dtsi | 4 ++
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9 files changed, 159 insertions(+), 16 deletions(-)
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--- a/arch/arm/boot/dts/kirkwood-6281.dtsi
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+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
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@@ -1,4 +1,39 @@
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/ {
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+ mbus {
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+ pcie-controller {
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+ compatible = "marvell,kirkwood-pcie";
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+ status = "disabled";
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+ device_type = "pci";
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+
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+ bus-range = <0x00 0xff>;
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+
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+ ranges =
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+ <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
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+ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
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+ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
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+
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+ pcie@1,0 {
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+ device_type = "pci";
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+ assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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+ reg = <0x0800 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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+ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
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+ interrupt-map-mask = <0 0 0 0>;
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+ interrupt-map = <0 0 0 0 &intc 9>;
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+ marvell,pcie-port = <0>;
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+ marvell,pcie-lane = <0>;
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+ clocks = <&gate_clk 2>;
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+ status = "disabled";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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compatible = "marvell,88f6281-pinctrl";
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--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
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+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
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@@ -1,4 +1,59 @@
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/ {
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+ mbus {
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+ pcie-controller {
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+ compatible = "marvell,kirkwood-pcie";
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+ status = "disabled";
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+ device_type = "pci";
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+
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+ bus-range = <0x00 0xff>;
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+
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+ ranges =
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+ <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
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+ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
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+ 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
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+ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
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+ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
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+ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
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+ 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
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+
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+ pcie@1,0 {
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+ device_type = "pci";
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+ assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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+ reg = <0x0800 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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+ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
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+ interrupt-map-mask = <0 0 0 0>;
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+ interrupt-map = <0 0 0 0 &intc 9>;
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+ marvell,pcie-port = <0>;
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+ marvell,pcie-lane = <0>;
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+ clocks = <&gate_clk 2>;
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+ status = "disabled";
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+ };
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+
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+ pcie@2,0 {
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+ device_type = "pci";
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+ assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
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+ reg = <0x1000 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+ ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
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+ 0x81000000 0 0 0x81000000 0x2 0 1 0>;
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+ interrupt-map-mask = <0 0 0 0>;
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+ interrupt-map = <0 0 0 0 &intc 10>;
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+ marvell,pcie-port = <1>;
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+ marvell,pcie-lane = <0>;
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+ clocks = <&gate_clk 18>;
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+ status = "disabled";
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+ };
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+ };
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+ };
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
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+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
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@@ -18,6 +18,17 @@
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linux,initrd-end = <0x4800000>;
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};
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+ mbus {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
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+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
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@@ -16,6 +16,17 @@
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bootargs = "console=ttyS0,115200n8 earlyprintk";
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};
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+ mbus {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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--- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
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+++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
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@@ -16,6 +16,17 @@
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bootargs = "console=ttyS0,115200n8 earlyprintk";
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};
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+ mbus {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
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+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
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@@ -16,6 +16,17 @@
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bootargs = "console=ttyS0,115200";
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};
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+ mbus {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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pinctrl-0 = <&pmx_unknown>;
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@@ -162,14 +173,6 @@
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reg = <0x5040000 0x2fc0000>;
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};
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};
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-
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- pcie-controller {
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- status = "okay";
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-
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- pcie@1,0 {
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- status = "okay";
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- };
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- };
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};
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gpio_keys {
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--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
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+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
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@@ -5,6 +5,17 @@
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#include "kirkwood-ts219.dtsi"
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/ {
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+ mbus {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@2,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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@@ -30,14 +41,6 @@
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marvell,function = "gpio";
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};
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};
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- pcie-controller {
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- status = "okay";
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-
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- pcie@2,0 {
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- status = "okay";
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- };
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- };
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-
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};
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gpio_keys {
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--- a/arch/arm/boot/dts/kirkwood-ts219.dtsi
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+++ b/arch/arm/boot/dts/kirkwood-ts219.dtsi
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@@ -13,6 +13,16 @@
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bootargs = "console=ttyS0,115200n8";
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};
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+ mbus {
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+ pcie-controller {
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+ status = "okay";
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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ocp@f1000000 {
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i2c@11000 {
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status = "okay";
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--- a/arch/arm/boot/dts/kirkwood.dtsi
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+++ b/arch/arm/boot/dts/kirkwood.dtsi
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@@ -20,7 +20,11 @@
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mbus {
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compatible = "marvell,kirkwood-mbus", "simple-bus";
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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controller = <&mbusc>;
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+ pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
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+ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
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};
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ocp@f1000000 {
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