mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 16:31:13 +00:00
374ab9decc
Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 43703
224 lines
6.2 KiB
Diff
224 lines
6.2 KiB
Diff
--- a/arch/arm/mach-gemini/devices.c 2011-04-23 01:00:16.738137491 +0200
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+++ b/arch/arm/mach-gemini/devices.c 2011-04-23 01:06:55.539299920 +0200
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@@ -188,3 +188,64 @@
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return platform_device_register(ðernet_device);
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}
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+
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+static struct resource usb0_resources[] = {
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+ {
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+ .start = GEMINI_USB0_BASE,
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+ .end = GEMINI_USB0_BASE + 0xfff,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = IRQ_USB0,
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+ .end = IRQ_USB0,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct resource usb1_resources[] = {
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+ {
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+ .start = GEMINI_USB1_BASE,
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+ .end = GEMINI_USB1_BASE + 0xfff,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = IRQ_USB1,
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+ .end = IRQ_USB1,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static u64 usb0_dmamask = 0xffffffffUL;
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+static u64 usb1_dmamask = 0xffffffffUL;
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+
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+static struct platform_device usb_device[] = {
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+ {
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+ .name = "ehci-fotg2",
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+ .id = 0,
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+ .dev = {
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+ .dma_mask = &usb0_dmamask,
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+ .coherent_dma_mask = 0xffffffff,
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+ },
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+ .num_resources = ARRAY_SIZE(usb0_resources),
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+ .resource = usb0_resources,
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+ },
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+ {
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+ .name = "ehci-fotg2",
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+ .id = 1,
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+ .dev = {
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+ .dma_mask = &usb1_dmamask,
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+ .coherent_dma_mask = 0xffffffff,
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+ },
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+ .num_resources = ARRAY_SIZE(usb1_resources),
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+ .resource = usb1_resources,
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+ },
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+};
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+
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+int __init platform_register_usb(unsigned int id)
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+{
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+ if (id > 1)
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+ return -EINVAL;
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+
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+ return platform_device_register(&usb_device[id]);
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+}
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+
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--- a/arch/arm/mach-gemini/common.h 2011-04-23 01:09:31.413161153 +0200
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+++ b/arch/arm/mach-gemini/common.h 2011-04-23 01:09:52.426358514 +0200
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@@ -28,6 +28,7 @@
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unsigned int nr_parts);
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extern int platform_register_watchdog(void);
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extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
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+extern int platform_register_usb(unsigned int id);
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extern void gemini_restart(char mode, const char *cmd);
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--- a/drivers/usb/Kconfig
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+++ b/drivers/usb/Kconfig
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@@ -39,6 +39,7 @@ config USB_ARCH_HAS_EHCI
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default y if ARCH_MXC
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default y if ARCH_MXS
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default y if ARCH_OMAP3
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+ default y if ARCH_GEMINI
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default y if ARCH_CNS3XXX
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default y if ARCH_VT8500
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default y if PLAT_SPEAR
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--- a/drivers/usb/host/ehci-hcd.c
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+++ b/drivers/usb/host/ehci-hcd.c
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@@ -340,12 +340,14 @@ static void ehci_silence_controller(struct ehci_hcd *ehci)
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spin_lock_irq(&ehci->lock);
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ehci->rh_state = EHCI_RH_HALTED;
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ehci_turn_off_all_ports(ehci);
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+#ifndef CONFIG_ARCH_GEMINI
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/* make BIOS/etc use companion controller during reboot */
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ehci_writel(ehci, 0, &ehci->regs->configured_flag);
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/* unblock posted writes */
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ehci_readl(ehci, &ehci->regs->configured_flag);
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+#endif
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spin_unlock_irq(&ehci->lock);
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}
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@@ -600,7 +602,9 @@ static int ehci_run (struct usb_hcd *hcd)
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// Philips, Intel, and maybe others need CMD_RUN before the
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// root hub will detect new devices (why?); NEC doesn't
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ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
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+#ifndef CONFIG_ARCH_GEMINI
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ehci->command |= CMD_RUN;
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+#endif
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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dbg_cmd (ehci, "init", ehci->command);
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@@ -620,9 +624,11 @@ static int ehci_run (struct usb_hcd *hcd)
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*/
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down_write(&ehci_cf_port_reset_rwsem);
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ehci->rh_state = EHCI_RH_RUNNING;
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+#ifndef CONFIG_ARCH_GEMINI
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ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
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ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
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msleep(5);
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+#endif
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up_write(&ehci_cf_port_reset_rwsem);
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ehci->last_periodic_enable = ktime_get_real();
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@@ -763,9 +769,10 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
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pcd_status = status;
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/* resume root hub? */
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+#ifndef CONFIG_ARCH_GEMINI
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if (ehci->rh_state == EHCI_RH_SUSPENDED)
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usb_hcd_resume_root_hub(hcd);
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-
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+#endif
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/* get per-port change detect bits */
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if (ehci->has_ppcd)
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ppcd = status >> 16;
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@@ -1228,6 +1241,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_AUTHOR (DRIVER_AUTHOR);
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MODULE_LICENSE ("GPL");
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+#ifdef CONFIG_ARCH_GEMINI
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+#include "ehci-fotg2.c"
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+#define PLATFORM_DRIVER ehci_fotg2_driver
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+#endif
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+
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#ifdef CONFIG_USB_EHCI_FSL
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#include "ehci-fsl.c"
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#define PLATFORM_DRIVER ehci_fsl_driver
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--- a/drivers/usb/host/ehci-timer.c 2012-12-24 18:35:19.695560879 +0100
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+++ b/drivers/usb/host/ehci-timer.c 2012-12-24 18:39:39.813308000 +0100
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@@ -207,7 +207,9 @@
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/* Clean up the mess */
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ehci->rh_state = EHCI_RH_HALTED;
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+#ifndef CONFIG_ARCH_GEMINI
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ehci_writel(ehci, 0, &ehci->regs->configured_flag);
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+#endif
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ehci_writel(ehci, 0, &ehci->regs->intr_enable);
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ehci_work(ehci);
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end_unlink_async(ehci);
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--- a/drivers/usb/host/ehci.h
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+++ b/drivers/usb/host/ehci.h
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@@ -600,7 +600,12 @@ static inline unsigned int
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ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
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{
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if (ehci_is_TDI(ehci)) {
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- switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
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+#ifdef CONFIG_ARCH_GEMINI
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+ portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
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+ switch ((portsc>>22)&3) {
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+#else
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+ switch ((portsc>>26)&3) {
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+#endif
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case 0:
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return 0;
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case 1:
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--- a/drivers/usb/host/ehci-hub.c
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+++ b/drivers/usb/host/ehci-hub.c
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@@ -912,6 +912,11 @@ static int ehci_hub_control (
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/* see what we found out */
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temp = check_reset_complete (ehci, wIndex, status_reg,
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ehci_readl(ehci, status_reg));
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+#ifdef CONFIG_ARCH_GEMINI
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+ /* restart schedule */
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+ ehci->command |= CMD_RUN;
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+ ehci_writel(ehci, ehci->command, &ehci->regs->command);
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+#endif
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}
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if (!(temp & (PORT_RESUME|PORT_RESET))) {
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--- a/include/linux/usb/ehci_def.h 2012-12-24 15:01:10.168320497 +0100
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+++ b/include/linux/usb/ehci_def.h 2012-12-24 15:11:43.335575000 +0100
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@@ -110,9 +110,14 @@
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u32 frame_list; /* points to periodic list */
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/* ASYNCLISTADDR: offset 0x18 */
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u32 async_next; /* address of next async queue head */
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-
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+#ifndef CONFIG_ARCH_GEMINI
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u32 reserved1[2];
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-
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+#else
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+ u32 reserved1;
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+ /* PORTSC: offset 0x20 for Faraday OTG */
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+ u32 port_status[1];
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+#endif
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+
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/* TXFILLTUNING: offset 0x24 */
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u32 txfill_tuning; /* TX FIFO Tuning register */
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#define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
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@@ -123,8 +128,11 @@
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u32 configured_flag;
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#define FLAG_CF (1<<0) /* true: we'll support "high speed" */
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+#ifndef CONFIG_ARCH_GEMINI
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/* PORTSC: offset 0x44 */
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u32 port_status[0]; /* up to N_PORTS */
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+#endif
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+
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/* EHCI 1.1 addendum */
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#define PORTSC_SUSPEND_STS_ACK 0
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#define PORTSC_SUSPEND_STS_NYET 1
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