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7f1b0f68f1
Convert this series by moving the definitions to the individual devices. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
227 lines
3.7 KiB
Plaintext
227 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "dlink,dir-853-a3", "mediatek,mt7621-soc";
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model = "D-Link DIR-853 A3";
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aliases {
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label-mac-device = &gmac0;
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led-boot = &led_power_orange;
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led-failsafe = &led_power_blue;
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led-running = &led_power_blue;
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led-upgrade = &led_net_orange;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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wifi {
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label = "wifi";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power_orange: power_orange {
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label = "orange:power";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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led_power_blue: power_blue {
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label = "blue:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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led_net_orange: net_orange {
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label = "orange:net";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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net_blue {
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label = "blue:net";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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usb_blue {
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label = "blue:usb";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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trigger-sources = <&xhci_ehci_port1>;
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linux,default-trigger = "usbport";
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};
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wlan2g {
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label = "blue:wlan2g";
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0radio";
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};
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wlan5g {
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label = "blue:wlan5g";
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1radio";
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};
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};
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "config";
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reg = <0x80000 0x80000>;
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read-only;
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};
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factory: partition@100000 {
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label = "factory";
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reg = <0x100000 0x40000>;
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read-only;
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};
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partition@140000 {
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label = "config2";
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reg = <0x140000 0x40000>;
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read-only;
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};
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partition@180000 {
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label = "firmware";
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,padding = <96>;
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reg = <0x180000 0x2800000>;
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};
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partition@2980000 {
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label = "private";
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reg = <0x2980000 0x2000000>;
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read-only;
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};
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partition@4980000 {
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label = "firmware2";
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reg = <0x4980000 0x2800000>;
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};
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partition@7180000 {
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label = "mydlink";
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reg = <0x7180000 0x600000>;
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read-only;
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};
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partition@7780000 {
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label = "reserved";
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reg = <0x7780000 0x880000>;
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read-only;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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/* 5 GHz (phy1) does not take the address from calibration data,
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but setting it manually here works */
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_e000>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan4";
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};
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port@1 {
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status = "okay";
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label = "lan3";
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};
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port@2 {
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status = "okay";
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label = "lan2";
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};
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port@3 {
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status = "okay";
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label = "lan1";
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};
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port@4 {
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status = "okay";
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label = "wan";
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nvmem-cells = <&macaddr_factory_e006>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uart2", "uart3", "jtag", "wdt";
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function = "gpio";
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};
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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macaddr_factory_e000: macaddr@e000 {
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reg = <0xe000 0x6>;
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};
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macaddr_factory_e006: macaddr@e006 {
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reg = <0xe006 0x6>;
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};
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};
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