mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
9131cb44ff
Introduce EN7581 SoC support with currently rfb board supported. This is a new 64bit SoC from Airoha that is currently almost fully supported upstream with only the DTS missing. Setting source-only waiting for the full upstream support to be completed. Link: https://github.com/openwrt/openwrt/pull/16730 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
41 lines
1.5 KiB
Diff
41 lines
1.5 KiB
Diff
From 8e38e08f2c560328a873c35aff1a0dbea6a7d084 Mon Sep 17 00:00:00 2001
|
|
From: Lorenzo Bianconi <lorenzo@kernel.org>
|
|
Date: Tue, 1 Oct 2024 12:10:25 +0200
|
|
Subject: [PATCH 2/2] net: airoha: fix PSE memory configuration in
|
|
airoha_fe_pse_ports_init()
|
|
|
|
Align PSE memory configuration to vendor SDK. In particular, increase
|
|
initial value of PSE reserved memory in airoha_fe_pse_ports_init()
|
|
routine by the value used for the second Packet Processor Engine (PPE2)
|
|
and do not overwrite the default value.
|
|
|
|
Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet support
|
|
for EN7581 SoC")
|
|
|
|
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
|
Reviewed-by: Simon Horman <horms@kernel.org>
|
|
Link: https://patch.msgid.link/20241001-airoha-eth-pse-fix-v2-2-9a56cdffd074@kernel.org
|
|
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
---
|
|
drivers/net/ethernet/mediatek/airoha_eth.c | 6 ++++--
|
|
1 file changed, 4 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/net/ethernet/mediatek/airoha_eth.c
|
|
+++ b/drivers/net/ethernet/mediatek/airoha_eth.c
|
|
@@ -1166,11 +1166,13 @@ static void airoha_fe_pse_ports_init(str
|
|
[FE_PSE_PORT_GDM4] = 2,
|
|
[FE_PSE_PORT_CDM5] = 2,
|
|
};
|
|
+ u32 all_rsv;
|
|
int q;
|
|
|
|
+ all_rsv = airoha_fe_get_pse_all_rsv(eth);
|
|
/* hw misses PPE2 oq rsv */
|
|
- airoha_fe_set(eth, REG_FE_PSE_BUF_SET,
|
|
- PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]);
|
|
+ all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2];
|
|
+ airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);
|
|
|
|
/* CMD1 */
|
|
for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
|