mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
76b903a415
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> SVN-Revision: 48374
554 lines
15 KiB
Diff
554 lines
15 KiB
Diff
From 4d9a32780ec795b9edc83c7b3a1e947cec49a5a4 Mon Sep 17 00:00:00 2001
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From: Michael Heimpold <mhei@heimpold.de>
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Date: Sat, 15 Aug 2015 20:26:18 +0200
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Subject: [PATCH] Add support for I2SE Duckbill boards
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Signed-off-by: Michael Heimpold <mhei@heimpold.de>
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---
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arch/arm/Kconfig | 6 ++
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arch/arm/include/asm/mach-types.h | 13 +++
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board/i2se/duckbill/Kconfig | 15 ++++
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board/i2se/duckbill/MAINTAINERS | 6 ++
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board/i2se/duckbill/Makefile | 12 +++
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board/i2se/duckbill/duckbill.c | 112 +++++++++++++++++++++++
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board/i2se/duckbill/iomux.c | 125 ++++++++++++++++++++++++++
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configs/duckbill_defconfig | 9 ++
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include/configs/duckbill.h | 177 +++++++++++++++++++++++++++++++++++++
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9 files changed, 475 insertions(+)
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create mode 100644 board/i2se/duckbill/Kconfig
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create mode 100644 board/i2se/duckbill/MAINTAINERS
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create mode 100644 board/i2se/duckbill/Makefile
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create mode 100644 board/i2se/duckbill/duckbill.c
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create mode 100644 board/i2se/duckbill/iomux.c
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create mode 100644 configs/duckbill_defconfig
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create mode 100644 include/configs/duckbill.h
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -178,6 +178,11 @@ config TARGET_MX28EVK
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select CPU_ARM926EJS
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select SUPPORT_SPL
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+config TARGET_DUCKBILL
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+ bool "Support I2SE Duckbill"
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+ select CPU_ARM926EJS
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+ select SUPPORT_SPL
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+
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config TARGET_MX23_OLINUXINO
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bool "Support mx23_olinuxino"
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select CPU_ARM926EJS
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@@ -926,6 +931,7 @@ source "board/genesi/mx51_efikamx/Kconfi
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source "board/gumstix/pepper/Kconfig"
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source "board/h2200/Kconfig"
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source "board/hisilicon/hikey/Kconfig"
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+source "board/i2se/duckbill/Kconfig"
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source "board/imx31_phycore/Kconfig"
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source "board/isee/igep0033/Kconfig"
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source "board/maxbcm/Kconfig"
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--- a/arch/arm/include/asm/mach-types.h
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+++ b/arch/arm/include/asm/mach-types.h
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@@ -1109,6 +1109,7 @@ extern unsigned int __machine_arch_type;
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#define MACH_TYPE_COLIBRI_T30 4493
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#define MACH_TYPE_APALIS_T30 4513
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#define MACH_TYPE_OMAPL138_LCDK 2495
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+#define MACH_TYPE_DUCKBILL 4754
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#ifdef CONFIG_ARCH_EBSA110
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# ifdef machine_arch_type
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@@ -14262,6 +14263,18 @@ extern unsigned int __machine_arch_type;
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# define machine_is_apalis_t30() (0)
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#endif
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+#ifdef CONFIG_MACH_DUCKBILL
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+# ifdef machine_arch_type
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+# undef machine_arch_type
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+# define machine_arch_type __machine_arch_type
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+# else
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+# define machine_arch_type MACH_TYPE_DUCKBILL
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+# endif
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+# define machine_is_duckbill() (machine_arch_type == MACH_TYPE_DUCKBILL)
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+#else
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+# define machine_is_duckbill() (0)
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+#endif
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+
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/*
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* These have not yet been registered
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*/
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--- /dev/null
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+++ b/board/i2se/duckbill/Kconfig
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@@ -0,0 +1,15 @@
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+if TARGET_DUCKBILL
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+
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+config SYS_BOARD
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+ default "duckbill"
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+
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+config SYS_VENDOR
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+ default "i2se"
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+
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+config SYS_SOC
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+ default "mxs"
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+
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+config SYS_CONFIG_NAME
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+ default "duckbill"
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+
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+endif
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--- /dev/null
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+++ b/board/i2se/duckbill/MAINTAINERS
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@@ -0,0 +1,6 @@
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+I2SE DUCKBILL BOARD
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+M: Michael Heimpold <mhei@heimpold.de>
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+S: Maintained
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+F: board/i2se/duckbill/
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+F: include/configs/duckbill.h
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+F: configs/duckbill_defconfig
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--- /dev/null
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+++ b/board/i2se/duckbill/Makefile
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@@ -0,0 +1,12 @@
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+#
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+# (C) Copyright 2014-2015
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+# Michael Heimpold, mhei@heimpold.de.
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+#
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+# SPDX-License-Identifier: GPL-2.0+
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+#
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+
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+ifndef CONFIG_SPL_BUILD
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+obj-y := duckbill.o
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+else
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+obj-y := iomux.o
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+endif
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--- /dev/null
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+++ b/board/i2se/duckbill/duckbill.c
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@@ -0,0 +1,112 @@
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+/*
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+ * I2SE Duckbill board
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+ *
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+ * (C) Copyright 2014-2015 Michael Heimpold <mhei@heimpold.de>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <asm/gpio.h>
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+#include <asm/io.h>
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+#include <asm/arch/imx-regs.h>
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+#include <asm/arch/iomux-mx28.h>
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+#include <asm/arch/clock.h>
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+#include <asm/arch/sys_proto.h>
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+#include <linux/mii.h>
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+#include <miiphy.h>
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+#include <netdev.h>
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+#include <errno.h>
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+
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+#define GPIO_PHY_RESET MX28_PAD_SSP0_DATA7__GPIO_2_7
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+#define GPIO_LED_GREEN MX28_PAD_AUART1_TX__GPIO_3_5
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+#define GPIO_LED_RED MX28_PAD_AUART1_RX__GPIO_3_4
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+/*
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+ * Functions
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+ */
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+int board_early_init_f(void)
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+{
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+ /* IO0 clock at 480MHz */
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+ mxs_set_ioclk(MXC_IOCLK0, 480000);
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+ /* IO1 clock at 480MHz */
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+ mxs_set_ioclk(MXC_IOCLK1, 480000);
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+
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+ /* SSP0 clock at 96MHz */
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+ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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+
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+ return 0;
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+}
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+
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+int dram_init(void)
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+{
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+ return mxs_dram_init();
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+}
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+
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+int board_init(void)
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+{
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+ /* Adress of boot parameters */
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+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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+
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+ return 0;
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+}
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+
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+#ifdef CONFIG_CMD_MMC
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+int board_mmc_init(bd_t *bis)
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+{
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+ return mxsmmc_initialize(bis, 0, NULL, NULL);
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+}
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+#endif
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+
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+#ifdef CONFIG_CMD_NET
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+int board_eth_init(bd_t *bis)
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+{
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+ int ret;
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+
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+ ret = cpu_eth_init(bis);
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+
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+ /* Reset PHY */
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+ gpio_direction_output(GPIO_PHY_RESET, 0);
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+ udelay(200);
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+ gpio_set_value(GPIO_PHY_RESET, 1);
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+
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+ /* give PHY some time to get out of the reset */
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+ udelay(10000);
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+
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+ ret = fecmxc_initialize(bis);
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+ if (ret) {
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+ puts("FEC MXS: Unable to init FEC\n");
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+ return ret;
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+ }
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+
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+ return ret;
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+}
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+
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+void mx28_adjust_mac(int dev_id, unsigned char *mac)
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+{
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+ mac[0] = 0x00;
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+ mac[1] = 0x01;
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+
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+ if (dev_id == 1) /* Let MAC1 be MAC0 + 1 by default */
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+ mac[5] += 1;
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+}
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+#endif
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+
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+int misc_init_r(void)
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+{
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+ char *s = getenv("serial#");
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+
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+ /* enable red LED to indicate a running bootloader */
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+ gpio_direction_output(GPIO_LED_RED, 1);
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+
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+ puts("Board: I2SE Duckbill\n");
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+ if (s && s[0]) {
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+ puts("Serial: ");
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+ puts(s);
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+ putc('\n');
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+ }
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+
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+ return 0;
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+}
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--- /dev/null
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+++ b/board/i2se/duckbill/iomux.c
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@@ -0,0 +1,125 @@
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+/*
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+ * I2SE Duckbill IOMUX setup
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+ *
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+ * Copyright (C) 2013-2015 Michael Heimpold <mhei@heimpold.de>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <config.h>
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+#include <asm/io.h>
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+#include <asm/arch/iomux-mx28.h>
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+#include <asm/arch/imx-regs.h>
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+#include <asm/arch/sys_proto.h>
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+
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+#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
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+#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
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+#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
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+
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+const iomux_cfg_t iomux_setup[] = {
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+ /* DUART */
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+ MX28_PAD_PWM0__DUART_RX,
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+ MX28_PAD_PWM1__DUART_TX,
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+
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+ /* SD card */
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+ MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
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+ MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
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+ MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
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+ MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
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+ MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
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+ MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
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+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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+ MX28_PAD_SSP0_SCK__SSP0_SCK |
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+ (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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+
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+ /* Ethernet */
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+ MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
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+ MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
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+
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+ /* PHY reset */
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+ MX28_PAD_SSP0_DATA7__GPIO_2_7 |
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+ (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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+
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+ /* EMI */
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+ MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
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+
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+ MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
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+ MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
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+
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+ /* LEDs */
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+ MX28_PAD_AUART1_RX__GPIO_3_4,
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+ MX28_PAD_AUART1_TX__GPIO_3_5,
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+};
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+
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+#define HW_DRAM_CTL29 (0x74 >> 2)
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+#define CS_MAP 0xf
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+#define COLUMN_SIZE 0x2
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+#define ADDR_PINS 0x1
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+#define APREBIT 0xa
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+
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+#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \
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+ ADDR_PINS << 8 | APREBIT)
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+
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+void mxs_adjust_memory_params(uint32_t *dram_vals)
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+{
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+ dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
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+}
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+
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+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
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+{
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+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
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+}
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--- /dev/null
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+++ b/configs/duckbill_defconfig
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@@ -0,0 +1,9 @@
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+CONFIG_ARM=y
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+CONFIG_TARGET_DUCKBILL=y
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+CONFIG_SPL=y
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+CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
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+# CONFIG_CMD_IMLS is not set
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+# CONFIG_CMD_FLASH is not set
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+# CONFIG_SPI_FLASH is not set
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+# CONFIG_CMD_FPGA is not set
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+CONFIG_CMD_PING=y
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--- /dev/null
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+++ b/include/configs/duckbill.h
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@@ -0,0 +1,177 @@
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+/*
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+ * Copyright (C) 2014-2015 Michael Heimpold <mhei@heimpold.de>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+#ifndef __CONFIGS_DUCKBILL_H__
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+#define __CONFIGS_DUCKBILL_H__
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+
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+/* System configurations */
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+#define CONFIG_MX28 /* i.MX28 SoC */
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+#define CONFIG_MACH_TYPE MACH_TYPE_DUCKBILL
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+
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+#define CONFIG_MISC_INIT_R
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+
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+#define CONFIG_SYS_MXS_VDD5V_ONLY
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+
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+/* U-Boot Commands */
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+#define CONFIG_SYS_NO_FLASH
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+#define CONFIG_DISPLAY_CPUINFO
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+#define CONFIG_DOS_PARTITION
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+
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+#define CONFIG_CMD_BOOTZ
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+#define CONFIG_CMD_CACHE
|
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+#define CONFIG_CMD_DHCP
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+#define CONFIG_CMD_EXT4
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+#define CONFIG_CMD_EXT4_WRITE
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+#define CONFIG_CMD_FAT
|
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+#define CONFIG_CMD_FUSE
|
|
+#define CONFIG_CMD_GPIO
|
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+#define CONFIG_CMD_I2C
|
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+#define CONFIG_CMD_MII
|
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+#define CONFIG_CMD_MMC
|
|
+#define CONFIG_CMD_SPI
|
|
+#define CONFIG_CMD_UNZIP
|
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+
|
|
+/* Memory configuration */
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|
+#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
|
|
+#define PHYS_SDRAM_1 0x40000000 /* Base address */
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+#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
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+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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+
|
|
+/* Environment is in MMC */
|
|
+#define CONFIG_ENV_OVERWRITE
|
|
+#define CONFIG_ENV_IS_IN_MMC 1
|
|
+#define CONFIG_ENV_SIZE (128 * 1024)
|
|
+#define CONFIG_ENV_OFFSET (128 * 1024)
|
|
+#define CONFIG_ENV_OFFSET_REDUND (256 * 1024)
|
|
+#define CONFIG_SYS_MMC_ENV_DEV 0
|
|
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
|
|
+
|
|
+/* FEC Ethernet on SoC */
|
|
+#ifdef CONFIG_CMD_NET
|
|
+#define CONFIG_FEC_MXC
|
|
+#define CONFIG_NET_MULTI
|
|
+#define CONFIG_MX28_FEC_MAC_IN_OCOTP
|
|
+#define CONFIG_FEC_MXC_PHYADDR 1
|
|
+#define IMX_FEC_BASE MXS_ENET0_BASE
|
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+#endif
|
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+
|
|
+#define CONFIG_IPADDR 192.168.1.10
|
|
+#define CONFIG_SERVERIP 192.168.1.1
|
|
+#define CONFIG_NETMASK 255.255.255.0
|
|
+#define CONFIG_GATEWAYIP 192.168.1.254
|
|
+
|
|
+/* BOOTP options */
|
|
+#define CONFIG_BOOTP_SUBNETMASK
|
|
+#define CONFIG_BOOTP_GATEWAY
|
|
+#define CONFIG_BOOTP_HOSTNAME
|
|
+
|
|
+/* SPI */
|
|
+#ifdef CONFIG_CMD_SPI
|
|
+#define CONFIG_DEFAULT_SPI_BUS 2
|
|
+#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
|
|
+#endif
|
|
+
|
|
+/* Boot Linux */
|
|
+#define CONFIG_BOOTDELAY 1
|
|
+#define CONFIG_BOOTFILE "zImage"
|
|
+#define CONFIG_LOADADDR 0x42000000
|
|
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
+
|
|
+/* Extra Environment */
|
|
+#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
+ "update_sd_firmware_filename=openwrt-mxs-root.ext4\0" \
|
|
+ "update_sd_firmware=" \
|
|
+ "if mmc rescan; then " \
|
|
+ "if tftp ${update_sd_firmware_filename}; then " \
|
|
+ "setexpr fw_sz ${filesize} / 200; " \
|
|
+ "setexpr fw_sz ${fw_sz} + 1; " \
|
|
+ "mmc dev ${mmcdev} 3; " \
|
|
+ "mmc write ${loadaddr} 0 ${fw_sz}; " \
|
|
+ "mmc dev ${mmcdev} 2; " \
|
|
+ "mmc write ${loadaddr} 0 ${fw_sz}; " \
|
|
+ "mmc dev ${mmcdev}; " \
|
|
+ "fi; " \
|
|
+ "fi\0" \
|
|
+ "erase_mmc=mmc erase 0 2\0" \
|
|
+ "erase_env1=mmc erase 100 100\0" \
|
|
+ "erase_env2=mmc erase 200 100\0" \
|
|
+ "script=boot.scr\0" \
|
|
+ "image=zImage\0" \
|
|
+ "console=ttyAMA0\0" \
|
|
+ "fdt_file=imx28-duckbill.dtb\0" \
|
|
+ "fdt_addr=0x41000000\0" \
|
|
+ "boot_fdt=try\0" \
|
|
+ "ip_dyn=yes\0" \
|
|
+ "bootsys=1\0" \
|
|
+ "mmcdev=0\0" \
|
|
+ "mmcpart=2\0" \
|
|
+ "mmcroot=/dev/mmcblk0p2\0" \
|
|
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
|
|
+ "root=${mmcroot} " \
|
|
+ "rootwait bootsys=${bootsys} panic=1\0" \
|
|
+ "loadbootscript=" \
|
|
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
|
+ "bootscript=echo Running bootscript from mmc ...; " \
|
|
+ "source\0" \
|
|
+ "loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${image}\0" \
|
|
+ "loadfdt=ext4load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/${fdt_file}\0" \
|
|
+ "mmcboot=echo Booting from mmc ...; " \
|
|
+ "setexpr mmcpart 1 + ${bootsys}; " \
|
|
+ "setenv mmcroot /dev/mmcblk0p${mmcpart}; " \
|
|
+ "run mmcargs; " \
|
|
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
|
+ "if run loadfdt; then " \
|
|
+ "bootz ${loadaddr} - ${fdt_addr}; " \
|
|
+ "else " \
|
|
+ "if test ${boot_fdt} = try; then " \
|
|
+ "bootz; " \
|
|
+ "else " \
|
|
+ "echo WARN: Cannot load the DT; " \
|
|
+ "fi; " \
|
|
+ "fi; " \
|
|
+ "else " \
|
|
+ "bootz; " \
|
|
+ "fi;\0" \
|
|
+ "netargs=setenv bootargs console=${console},${baudrate} " \
|
|
+ "root=/dev/nfs " \
|
|
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
|
+ "netboot=echo Booting from net ...; " \
|
|
+ "run netargs; " \
|
|
+ "if test ${ip_dyn} = yes; then " \
|
|
+ "setenv get_cmd dhcp; " \
|
|
+ "else " \
|
|
+ "setenv get_cmd tftp; " \
|
|
+ "fi; " \
|
|
+ "${get_cmd} ${image}; " \
|
|
+ "if test ${boot_fdt} = yes; then " \
|
|
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
|
+ "bootz ${loadaddr} - ${fdt_addr}; " \
|
|
+ "else " \
|
|
+ "if test ${boot_fdt} = try; then " \
|
|
+ "bootz; " \
|
|
+ "else " \
|
|
+ "echo WARN: Cannot load the DT; " \
|
|
+ "fi;" \
|
|
+ "fi; " \
|
|
+ "else " \
|
|
+ "bootz; " \
|
|
+ "fi;\0"
|
|
+
|
|
+#define CONFIG_BOOTCOMMAND \
|
|
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
|
|
+ "if run loadbootscript; then " \
|
|
+ "run bootscript; " \
|
|
+ "else " \
|
|
+ "if run loadimage; then " \
|
|
+ "run mmcboot; " \
|
|
+ "else run netboot; " \
|
|
+ "fi; " \
|
|
+ "fi; " \
|
|
+ "else run netboot; fi"
|
|
+
|
|
+/* The rest of the configuration is shared */
|
|
+#include <configs/mxs.h>
|
|
+
|
|
+#endif /* __CONFIGS_DUCKBILL_H__ */
|