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565b62cca2
At least since gcc 7.3.0 (OpenWrt 18.06) lwr/lwl are used in the assembly of LzmaProps_Decode. While the decission made by the compiler looks perfect fine, it triggers some obscure hang on lantiq danube-s v1.5 with MX29LV640EB NOR flash chips. Only if the offset 1 is used, the hang can be observed. Using any other offset works fine: lwl s0,0(a1) - s0 == 0x6d000080 lwl s0,1(a1) - hangs lwl s0,2(a1) - s0 == 0x0080xxxx lwl s0,3(a1) - s0 == 0x80xxxxxx It isn't clear whether it is a limitation of the flash chip, the EBU or something else. Force 8bit reads to prevent gcc optimizing the read with lwr/lwl instructions. Signed-off-by: Mathias Kresin <dev@kresin.me> |
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arm-trusted-firmware-mediatek | ||
arm-trusted-firmware-mvebu | ||
arm-trusted-firmware-rockchip | ||
arm-trusted-firmware-sunxi | ||
arm-trusted-firmware-tools | ||
at91bootstrap | ||
fconfig | ||
grub2 | ||
imx-bootlets | ||
kexec-tools | ||
kobs-ng | ||
mt7623n-preloader | ||
tfa-layerscape | ||
uboot-at91 | ||
uboot-envtools | ||
uboot-fritz4040 | ||
uboot-imx | ||
uboot-kirkwood | ||
uboot-lantiq | ||
uboot-layerscape | ||
uboot-mediatek | ||
uboot-mvebu | ||
uboot-mxs | ||
uboot-omap | ||
uboot-oxnas | ||
uboot-ramips | ||
uboot-rockchip | ||
uboot-sunxi | ||
uboot-tegra | ||
uboot-zynq |