mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
f0c740650b
The following patches are dropped because they are now upstreamed:
- 0002-gpio-stp-xway-Implement-get-callback.patch
upstreamed with commit 5b9b2b5284f819 ("gpio: stp-xway: Implement get
callback")
- 0027-01-net-phy-intel-xway-add-VR9-version-number.patch
upstreamed with commit 5b73d9955fb4b0 ("net: phy: intel-xway: add VR9
version number")
- 0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch
upstreamed with commit f452518c982e57 ("net: phy: intel-xway: add VR9
v1.1 phy ids")
The following patches were updated:
- 0018-MTD-nand-lots-of-xrx200-fixes.patch
the mainline driver now resides in drivers/mtd/nand/raw/xway_nand.c
(instead of drivers/mtd/nand/xway_nand.c)
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
the DMA API now requires a valid device to be passed to all operations
- 0028-NET-lantiq-various-etop-fixes.patch
the DMA API now requires a valid device to be passed to all operations
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
From 14909c4e4e836925668e74fc6e0e85ba0283cbf9 Mon Sep 17 00:00:00 2001
|
|
From: Hauke Mehrtens <hauke@hauke-m.de>
|
|
Date: Fri, 6 Jan 2017 17:40:12 +0100
|
|
Subject: [PATCH 2/2] MIPS: lantiq: improve USB initialization
|
|
|
|
This adds code to initialize the USB controller and PHY also on Danube,
|
|
Amazon SE and AR10. This code is based on the Vendor driver from
|
|
different UGW versions and compared to the hardware documentation.
|
|
|
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|
---
|
|
arch/mips/lantiq/xway/sysctrl.c | 20 +++++++
|
|
2 files changed, 110 insertions(+), 30 deletions(-)
|
|
|
|
|
|
--- a/arch/mips/lantiq/xway/sysctrl.c
|
|
+++ b/arch/mips/lantiq/xway/sysctrl.c
|
|
@@ -246,6 +246,25 @@ static void pmu_disable(struct clk *clk)
|
|
pr_warn("deactivating PMU module failed!");
|
|
}
|
|
|
|
+static void usb_set_clock(void)
|
|
+{
|
|
+ unsigned int val = ltq_cgu_r32(ifccr);
|
|
+
|
|
+ if (of_machine_is_compatible("lantiq,ar10") ||
|
|
+ of_machine_is_compatible("lantiq,grx390")) {
|
|
+ val &= ~0x03; /* XTAL divided by 3 */
|
|
+ } else if (of_machine_is_compatible("lantiq,ar9") ||
|
|
+ of_machine_is_compatible("lantiq,vr9")) {
|
|
+ /* TODO: this depends on the XTAL frequency */
|
|
+ val |= 0x03; /* XTAL divided by 3 */
|
|
+ } else if (of_machine_is_compatible("lantiq,ase")) {
|
|
+ val |= 0x20; /* from XTAL */
|
|
+ } else if (of_machine_is_compatible("lantiq,danube")) {
|
|
+ val |= 0x30; /* 12 MHz, generated from 36 MHz */
|
|
+ }
|
|
+ ltq_cgu_w32(val, ifccr);
|
|
+}
|
|
+
|
|
/* the pci enable helper */
|
|
static int pci_enable(struct clk *clk)
|
|
{
|
|
@@ -567,4 +586,5 @@ void __init ltq_soc_init(void)
|
|
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
|
|
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
|
|
}
|
|
+ usb_set_clock();
|
|
}
|