mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
05b8e84362
Manually merged:
backport-5.4
011-kbuild-export-SUBARCH.patch
layerscape
701-net-0262-net-dsa-ocelot-add-tagger-for-Ocelot-Felix-switches.patch
All other modifications made by update_kernel.sh
Build-tested: x86/64, lantiq/xrx200, ramips/mt7621
Run-tested: ipq806x (R7800), lantiq/xrx200, x86/64, ramips (RT-AC57U)
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[minor commit message adjustments]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
62 lines
2.1 KiB
Diff
62 lines
2.1 KiB
Diff
From 69673b5ab6f814cf679285f0c45baa318ab9e0d7 Mon Sep 17 00:00:00 2001
|
|
From: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Date: Thu, 27 Apr 2017 10:22:12 +0800
|
|
Subject: [PATCH] config/qe: add irq-qeic support.
|
|
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
---
|
|
MAINTAINERS | 6 ++++++
|
|
drivers/irqchip/Makefile | 1 +
|
|
drivers/net/ethernet/freescale/Kconfig | 11 ++++++-----
|
|
3 files changed, 13 insertions(+), 5 deletions(-)
|
|
|
|
--- a/MAINTAINERS
|
|
+++ b/MAINTAINERS
|
|
@@ -6597,6 +6597,12 @@ F: drivers/soc/fsl/qe/
|
|
F: include/soc/fsl/*qe*.h
|
|
F: include/soc/fsl/*ucc*.h
|
|
|
|
+FREESCALE QEIC DRIVERS
|
|
+M: Qiang Zhao <qiang.zhao@nxp.com>
|
|
+L: linux-kernel@vger.kernel.org
|
|
+S: Maintained
|
|
+F: drivers/irqchip/irq-qeic.c
|
|
+
|
|
FREESCALE QUICC ENGINE UCC ETHERNET DRIVER
|
|
M: Li Yang <leoyang.li@nxp.com>
|
|
L: netdev@vger.kernel.org
|
|
--- a/drivers/irqchip/Makefile
|
|
+++ b/drivers/irqchip/Makefile
|
|
@@ -103,3 +103,4 @@ obj-$(CONFIG_MADERA_IRQ) += irq-madera.
|
|
obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o
|
|
obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o
|
|
obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o
|
|
+obj-$(CONFIG_QUICC_ENGINE) += irq-qeic.o
|
|
--- a/drivers/net/ethernet/freescale/Kconfig
|
|
+++ b/drivers/net/ethernet/freescale/Kconfig
|
|
@@ -6,10 +6,11 @@
|
|
config NET_VENDOR_FREESCALE
|
|
bool "Freescale devices"
|
|
default y
|
|
- depends on FSL_SOC || QUICC_ENGINE || CPM1 || CPM2 || PPC_MPC512x || \
|
|
- M523x || M527x || M5272 || M528x || M520x || M532x || \
|
|
- ARCH_MXC || ARCH_MXS || (PPC_MPC52xx && PPC_BESTCOMM) || \
|
|
- ARCH_LAYERSCAPE || COMPILE_TEST
|
|
+ depends on FSL_SOC || (QUICC_ENGINE && PPC32) || CPM1 || CPM2 || \
|
|
+ PPC_MPC512x || M523x || M527x || M5272 || M528x || M520x || \
|
|
+ M532x || ARCH_MXC || ARCH_MXS || \
|
|
+ (PPC_MPC52xx && PPC_BESTCOMM) || ARCH_LAYERSCAPE || \
|
|
+ COMPILE_TEST
|
|
---help---
|
|
If you have a network (Ethernet) card belonging to this class, say Y.
|
|
|
|
@@ -74,7 +75,7 @@ config FSL_XGMAC_MDIO
|
|
|
|
config UCC_GETH
|
|
tristate "Freescale QE Gigabit Ethernet"
|
|
- depends on QUICC_ENGINE
|
|
+ depends on QUICC_ENGINE && FSL_SOC && PPC32
|
|
select FSL_PQ_MDIO
|
|
select PHYLIB
|
|
select FIXED_PHY
|