mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
08d8a3646b
These patches have been accepted for linux v5.13. External interrupts not supported for now. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
243 lines
6.4 KiB
Diff
243 lines
6.4 KiB
Diff
From 9fbf8303796c89ecab026eb3dbadae7f98c49922 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
|
|
Date: Wed, 24 Mar 2021 09:19:15 +0100
|
|
Subject: [PATCH 14/22] dt-bindings: add BCM6368 pincontroller binding
|
|
documentation
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
Add binding documentation for the pincontrol core found in BCM6368 SoCs.
|
|
|
|
Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
|
|
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
|
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
|
|
Reviewed-by: Rob Herring <robh@kernel.org>
|
|
Link: https://lore.kernel.org/r/20210324081923.20379-15-noltari@gmail.com
|
|
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
---
|
|
.../pinctrl/brcm,bcm6368-pinctrl.yaml | 217 ++++++++++++++++++
|
|
1 file changed, 217 insertions(+)
|
|
create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
|
|
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
|
|
@@ -0,0 +1,217 @@
|
|
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
+%YAML 1.2
|
|
+---
|
|
+$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml#
|
|
+$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
+
|
|
+title: Broadcom BCM6368 pin controller
|
|
+
|
|
+maintainers:
|
|
+ - Álvaro Fernández Rojas <noltari@gmail.com>
|
|
+ - Jonas Gorski <jonas.gorski@gmail.com>
|
|
+
|
|
+description:
|
|
+ Bindings for Broadcom's BCM6368 memory-mapped pin controller.
|
|
+
|
|
+properties:
|
|
+ compatible:
|
|
+ const: brcm,bcm6368-pinctrl
|
|
+
|
|
+ reg:
|
|
+ maxItems: 2
|
|
+
|
|
+patternProperties:
|
|
+ '-pins$':
|
|
+ type: object
|
|
+ $ref: pinmux-node.yaml#
|
|
+
|
|
+ properties:
|
|
+ function:
|
|
+ enum: [ analog_afe_0, analog_afe_1, sys_irq, serial_led_data,
|
|
+ serial_led_clk, inet_led, ephy0_led, ephy1_led, ephy2_led,
|
|
+ ephy3_led, robosw_led_data, robosw_led_clk, robosw_led0,
|
|
+ robosw_led1, usb_device_led, pci_req1, pci_gnt1, pci_intb,
|
|
+ pci_req0, pci_gnt0, pcmcia_cd1, pcmcia_cd2, pcmcia_vs1,
|
|
+ pcmcia_vs2, ebi_cs2, ebi_cs3, spi_cs2, spi_cs3, spi_cs4,
|
|
+ spi_cs5, uart1 ]
|
|
+
|
|
+ pins:
|
|
+ enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
|
|
+ gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
|
|
+ gpio16, gpio17, gpio18, gpio19, gpio20, gpio22, gpio23,
|
|
+ gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
|
|
+ gpio31, uart1_grp ]
|
|
+
|
|
+required:
|
|
+ - compatible
|
|
+ - reg
|
|
+
|
|
+additionalProperties: false
|
|
+
|
|
+examples:
|
|
+ - |
|
|
+ pinctrl@18 {
|
|
+ compatible = "brcm,bcm6368-pinctrl";
|
|
+ reg = <0x18 0x4>, <0x38 0x4>;
|
|
+
|
|
+ pinctrl_analog_afe_0: analog_afe_0-pins {
|
|
+ function = "analog_afe_0";
|
|
+ pins = "gpio0";
|
|
+ };
|
|
+
|
|
+ pinctrl_analog_afe_1: analog_afe_1-pins {
|
|
+ function = "analog_afe_1";
|
|
+ pins = "gpio1";
|
|
+ };
|
|
+
|
|
+ pinctrl_sys_irq: sys_irq-pins {
|
|
+ function = "sys_irq";
|
|
+ pins = "gpio2";
|
|
+ };
|
|
+
|
|
+ pinctrl_serial_led: serial_led-pins {
|
|
+ pinctrl_serial_led_data: serial_led_data-pins {
|
|
+ function = "serial_led_data";
|
|
+ pins = "gpio3";
|
|
+ };
|
|
+
|
|
+ pinctrl_serial_led_clk: serial_led_clk-pins {
|
|
+ function = "serial_led_clk";
|
|
+ pins = "gpio4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pinctrl_inet_led: inet_led-pins {
|
|
+ function = "inet_led";
|
|
+ pins = "gpio5";
|
|
+ };
|
|
+
|
|
+ pinctrl_ephy0_led: ephy0_led-pins {
|
|
+ function = "ephy0_led";
|
|
+ pins = "gpio6";
|
|
+ };
|
|
+
|
|
+ pinctrl_ephy1_led: ephy1_led-pins {
|
|
+ function = "ephy1_led";
|
|
+ pins = "gpio7";
|
|
+ };
|
|
+
|
|
+ pinctrl_ephy2_led: ephy2_led-pins {
|
|
+ function = "ephy2_led";
|
|
+ pins = "gpio8";
|
|
+ };
|
|
+
|
|
+ pinctrl_ephy3_led: ephy3_led-pins {
|
|
+ function = "ephy3_led";
|
|
+ pins = "gpio9";
|
|
+ };
|
|
+
|
|
+ pinctrl_robosw_led_data: robosw_led_data-pins {
|
|
+ function = "robosw_led_data";
|
|
+ pins = "gpio10";
|
|
+ };
|
|
+
|
|
+ pinctrl_robosw_led_clk: robosw_led_clk-pins {
|
|
+ function = "robosw_led_clk";
|
|
+ pins = "gpio11";
|
|
+ };
|
|
+
|
|
+ pinctrl_robosw_led0: robosw_led0-pins {
|
|
+ function = "robosw_led0";
|
|
+ pins = "gpio12";
|
|
+ };
|
|
+
|
|
+ pinctrl_robosw_led1: robosw_led1-pins {
|
|
+ function = "robosw_led1";
|
|
+ pins = "gpio13";
|
|
+ };
|
|
+
|
|
+ pinctrl_usb_device_led: usb_device_led-pins {
|
|
+ function = "usb_device_led";
|
|
+ pins = "gpio14";
|
|
+ };
|
|
+
|
|
+ pinctrl_pci: pci-pins {
|
|
+ pinctrl_pci_req1: pci_req1-pins {
|
|
+ function = "pci_req1";
|
|
+ pins = "gpio16";
|
|
+ };
|
|
+
|
|
+ pinctrl_pci_gnt1: pci_gnt1-pins {
|
|
+ function = "pci_gnt1";
|
|
+ pins = "gpio17";
|
|
+ };
|
|
+
|
|
+ pinctrl_pci_intb: pci_intb-pins {
|
|
+ function = "pci_intb";
|
|
+ pins = "gpio18";
|
|
+ };
|
|
+
|
|
+ pinctrl_pci_req0: pci_req0-pins {
|
|
+ function = "pci_req0";
|
|
+ pins = "gpio19";
|
|
+ };
|
|
+
|
|
+ pinctrl_pci_gnt0: pci_gnt0-pins {
|
|
+ function = "pci_gnt0";
|
|
+ pins = "gpio20";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pinctrl_pcmcia: pcmcia-pins {
|
|
+ pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
|
|
+ function = "pcmcia_cd1";
|
|
+ pins = "gpio22";
|
|
+ };
|
|
+
|
|
+ pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
|
|
+ function = "pcmcia_cd2";
|
|
+ pins = "gpio23";
|
|
+ };
|
|
+
|
|
+ pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
|
|
+ function = "pcmcia_vs1";
|
|
+ pins = "gpio24";
|
|
+ };
|
|
+
|
|
+ pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
|
|
+ function = "pcmcia_vs2";
|
|
+ pins = "gpio25";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pinctrl_ebi_cs2: ebi_cs2-pins {
|
|
+ function = "ebi_cs2";
|
|
+ pins = "gpio26";
|
|
+ };
|
|
+
|
|
+ pinctrl_ebi_cs3: ebi_cs3-pins {
|
|
+ function = "ebi_cs3";
|
|
+ pins = "gpio27";
|
|
+ };
|
|
+
|
|
+ pinctrl_spi_cs2: spi_cs2-pins {
|
|
+ function = "spi_cs2";
|
|
+ pins = "gpio28";
|
|
+ };
|
|
+
|
|
+ pinctrl_spi_cs3: spi_cs3-pins {
|
|
+ function = "spi_cs3";
|
|
+ pins = "gpio29";
|
|
+ };
|
|
+
|
|
+ pinctrl_spi_cs4: spi_cs4-pins {
|
|
+ function = "spi_cs4";
|
|
+ pins = "gpio30";
|
|
+ };
|
|
+
|
|
+ pinctrl_spi_cs5: spi_cs5-pins {
|
|
+ function = "spi_cs5";
|
|
+ pins = "gpio31";
|
|
+ };
|
|
+
|
|
+ pinctrl_uart1: uart1-pins {
|
|
+ function = "uart1";
|
|
+ group = "uart1_grp";
|
|
+ };
|
|
+ };
|