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08d8a3646b
These patches have been accepted for linux v5.13. External interrupts not supported for now. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
154 lines
4.1 KiB
Diff
154 lines
4.1 KiB
Diff
From cfb1b98bc8d5ffd813428cb03c63b54cf63dd785 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Wed, 24 Mar 2021 09:19:10 +0100
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Subject: [PATCH 09/22] dt-bindings: add BCM6358 GPIO sysctl binding
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documentation
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add binding documentation for the GPIO sysctl found in BCM6358 SoCs.
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Link: https://lore.kernel.org/r/20210324081923.20379-10-noltari@gmail.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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.../mfd/brcm,bcm6358-gpio-sysctl.yaml | 130 ++++++++++++++++++
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1 file changed, 130 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
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@@ -0,0 +1,130 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Broadcom BCM6358 GPIO System Controller Device Tree Bindings
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+
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+maintainers:
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+ - Álvaro Fernández Rojas <noltari@gmail.com>
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+ - Jonas Gorski <jonas.gorski@gmail.com>
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+
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+description:
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+ Broadcom BCM6358 SoC GPIO system controller which provides a register map
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+ for controlling the GPIO and pins of the SoC.
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+
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+properties:
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+ "#address-cells": true
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+
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+ "#size-cells": true
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+
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+ compatible:
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+ items:
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+ - const: brcm,bcm6358-gpio-sysctl
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+ - const: syscon
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+ - const: simple-mfd
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+
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+ ranges:
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+ maxItems: 1
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+
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+ reg:
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+ maxItems: 1
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+
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+patternProperties:
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+ "^gpio@[0-9a-f]+$":
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+ # Child node
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+ type: object
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+ $ref: "../gpio/brcm,bcm6345-gpio.yaml"
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+ description:
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+ GPIO controller for the SoC GPIOs. This child node definition
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+ should follow the bindings specified in
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+ Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
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+
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+ "^pinctrl@[0-9a-f]+$":
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+ # Child node
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+ type: object
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+ $ref: "../pinctrl/brcm,bcm6358-pinctrl.yaml"
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+ description:
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+ Pin controller for the SoC pins. This child node definition
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+ should follow the bindings specified in
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+ Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml.
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+
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+required:
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+ - "#address-cells"
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+ - compatible
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+ - ranges
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+ - reg
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+ - "#size-cells"
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ syscon@fffe0080 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "brcm,bcm6358-gpio-sysctl", "syscon", "simple-mfd";
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+ reg = <0xfffe0080 0x80>;
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+ ranges = <0 0xfffe0080 0x80>;
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+
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+ gpio@0 {
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+ compatible = "brcm,bcm6358-gpio";
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+ reg-names = "dirout", "dat";
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+ reg = <0x0 0x8>, <0x8 0x8>;
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+
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+ gpio-controller;
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+ gpio-ranges = <&pinctrl 0 0 40>;
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+ #gpio-cells = <2>;
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+ };
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+
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+ pinctrl: pinctrl@18 {
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+ compatible = "brcm,bcm6358-pinctrl";
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+ reg = <0x18 0x4>;
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+
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+ pinctrl_ebi_cs: ebi_cs-pins {
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+ function = "ebi_cs";
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+ groups = "ebi_cs_grp";
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+ };
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+
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+ pinctrl_uart1: uart1-pins {
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+ function = "uart1";
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+ groups = "uart1_grp";
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+ };
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+
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+ pinctrl_serial_led: serial_led-pins {
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+ function = "serial_led";
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+ groups = "serial_led_grp";
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+ };
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+
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+ pinctrl_legacy_led: legacy_led-pins {
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+ function = "legacy_led";
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+ groups = "legacy_led_grp";
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+ };
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+
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+ pinctrl_led: led-pins {
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+ function = "led";
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+ groups = "led_grp";
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+ };
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+
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+ pinctrl_spi_cs_23: spi_cs-pins {
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+ function = "spi_cs";
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+ groups = "spi_cs_grp";
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+ };
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+
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+ pinctrl_utopia: utopia-pins {
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+ function = "utopia";
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+ groups = "utopia_grp";
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+ };
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+
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+ pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
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+ function = "pwm_syn_clk";
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+ groups = "pwm_syn_clk_grp";
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+ };
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+
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+ pinctrl_sys_irq: sys_irq-pins {
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+ function = "sys_irq";
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+ groups = "sys_irq_grp";
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+ };
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+ };
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+ };
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