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a664d39c5b
SNR SNR-CPE-ME2-Lite is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based on MT7621A.
Specification:
- SoC : MediaTek MT7621A
- RAM : DDR3 128 MiB
- Flash : SPI-NOR 16 MiB
- WLAN : 2.4 GHz 2T2R (MediaTek MT7603E)
5 GHz 2T2R (MediaTek MT7613BE)
- Ethernet : 10/100/1000 Mbps x5
- Switch : MediaTek MT7530 (SoC)
- UART : through-hole on PCB
- J4: 3.3V, GND, TX, RX
- 57600n8
- Power : 12 VDC, 1.5 A
Flash instruction via WEB (firmware 1.10.4 and later)
1. Boot SNR-CPE-ME2-Lite normally with "Router" mode
2. Access to "http://192.168.1.1/" and open "Administration -> Management" page
3. Select the OpenWrt factory image in "Firmware update" section and click "Update" button
4. Wait ~120 seconds to complete flashing
Flash instruction via TFTP (all version):
1. Boot SNR-CPE-ME2-Lite to recovery mode (hold the reset button while power on)
2. Send firmware via TFTP client:
TFTP Server address: 192.168.1.1
TFTP Client address: 192.168.1.131
3. Wait ~120 seconds to complete flashing
Signed-off-by: Alexey Kosmakov <a.kosmakov@nagtech.ru>
174 lines
2.6 KiB
Plaintext
174 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "snr,snr-cpe-me2-lite", "mediatek,mt7621-soc";
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model = "SNR-CPE-ME2-Lite";
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leds {
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compatible = "gpio-leds";
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led_sys: led-0 {
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label = "green:sys";
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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};
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led_vpn: led-1 {
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label = "green:vpn";
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&state_default {
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gpio {
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groups = "jtag", "wdt";
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function = "gpio";
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};
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};
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&gdma {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <104000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "config";
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reg = <0x30000 0x10000>;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&mdio {
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_e000>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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status = "okay";
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label = "wan";
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phy-handle = <ðphy0>;
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nvmem-cells = <&macaddr_factory_e006>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@1 {
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status = "okay";
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label = "lan1";
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};
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port@2 {
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status = "okay";
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label = "lan2";
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};
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port@3 {
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status = "okay";
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label = "lan3";
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};
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port@4 {
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status = "okay";
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label = "lan4";
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_e000: macaddr@e000 {
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reg = <0xe000 0x6>;
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};
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macaddr_factory_e006: macaddr@e006 {
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reg = <0xe006 0x6>;
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};
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};
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