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58f4667a37
New stm32 target introduces support for stm32mp1 based devices.
For now it includes an initial support of the STM32MP135F-DK device.
The specifications bellow only list supported features.
Specifications
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SOC: STM32MP135FAF7
RAM: 512 MiB
Storage: SD Card
Ethernet: 2x 100 Mbps
Wireless: 2.4GHz Cypress CYW43455 (802.11b/g/n)
LEDs: Heartbeat (Blue)
Buttons: 1x Reset, 1x User (USER2)
USB: 4x 2.0 Type-A
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/16716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 851e7f77e4)
Link: https://github.com/openwrt/openwrt/pull/17097
Signed-off-by: Petr Štetiar <ynezz@true.cz>
167 lines
5.3 KiB
Diff
167 lines
5.3 KiB
Diff
From 1bcfbfd7c9aa716f61a01682345a1b329f6a6e66 Mon Sep 17 00:00:00 2001
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From: Christophe Kerello <christophe.kerello@foss.st.com>
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Date: Wed, 8 Nov 2023 15:16:37 +0100
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Subject: [PATCH] mmc: mmci: stm32: add SDIO in-band interrupt mode
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Add the support of SDIO in-band interrupt mode for STM32 and Ux500
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variants.
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It allows the SD I/O card to interrupt the host on SDMMC_D1 data line.
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It is not enabled by default on Ux500 variant as this is unstable and
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Ux500 users should use out-of-band IRQs.
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Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
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Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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Link: https://lore.kernel.org/r/20231108141637.119497-1-yann.gautier@foss.st.com
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/mmc/host/mmci.c | 69 +++++++++++++++++++++++++++++++++++++++--
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drivers/mmc/host/mmci.h | 2 ++
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2 files changed, 69 insertions(+), 2 deletions(-)
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--- a/drivers/mmc/host/mmci.c
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+++ b/drivers/mmc/host/mmci.c
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@@ -272,6 +272,7 @@ static struct variant_data variant_stm32
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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.stm32_idmabsize_mask = GENMASK(12, 5),
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.stm32_idmabsize_align = BIT(5),
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+ .supports_sdio_irq = true,
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.busy_timeout = true,
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.busy_detect = true,
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.busy_detect_flag = MCI_STM32_BUSYD0,
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@@ -299,6 +300,7 @@ static struct variant_data variant_stm32
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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.stm32_idmabsize_mask = GENMASK(16, 5),
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.stm32_idmabsize_align = BIT(5),
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+ .supports_sdio_irq = true,
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.dma_lli = true,
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.busy_timeout = true,
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.busy_detect = true,
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@@ -327,6 +329,7 @@ static struct variant_data variant_stm32
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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.stm32_idmabsize_mask = GENMASK(16, 6),
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.stm32_idmabsize_align = BIT(6),
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+ .supports_sdio_irq = true,
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.dma_lli = true,
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.busy_timeout = true,
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.busy_detect = true,
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@@ -420,8 +423,9 @@ void mmci_write_pwrreg(struct mmci_host
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*/
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static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl)
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{
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- /* Keep busy mode in DPSM if enabled */
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- datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag;
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+ /* Keep busy mode in DPSM and SDIO mask if enabled */
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+ datactrl |= host->datactrl_reg & (host->variant->busy_dpsm_flag |
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+ host->variant->datactrl_mask_sdio);
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if (host->datactrl_reg != datactrl) {
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host->datactrl_reg = datactrl;
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@@ -1761,6 +1765,25 @@ static irqreturn_t mmci_pio_irq(int irq,
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return IRQ_HANDLED;
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}
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+static void mmci_write_sdio_irq_bit(struct mmci_host *host, int enable)
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+{
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+ void __iomem *base = host->base;
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+ u32 mask = readl_relaxed(base + MMCIMASK0);
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+
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+ if (enable)
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+ writel_relaxed(mask | MCI_ST_SDIOITMASK, base + MMCIMASK0);
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+ else
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+ writel_relaxed(mask & ~MCI_ST_SDIOITMASK, base + MMCIMASK0);
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+}
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+
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+static void mmci_signal_sdio_irq(struct mmci_host *host, u32 status)
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+{
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+ if (status & MCI_ST_SDIOIT) {
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+ mmci_write_sdio_irq_bit(host, 0);
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+ sdio_signal_irq(host->mmc);
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+ }
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+}
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+
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/*
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* Handle completion of command and data transfers.
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*/
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@@ -1805,6 +1828,9 @@ static irqreturn_t mmci_irq(int irq, voi
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mmci_data_irq(host, host->data, status);
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}
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+ if (host->variant->supports_sdio_irq)
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+ mmci_signal_sdio_irq(host, status);
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+
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/*
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* Busy detection has been handled by mmci_cmd_irq() above.
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* Clear the status bit to prevent polling in IRQ context.
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@@ -2041,6 +2067,35 @@ static int mmci_sig_volt_switch(struct m
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return ret;
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}
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+static void mmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
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+{
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+ struct mmci_host *host = mmc_priv(mmc);
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+ unsigned long flags;
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+
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+ if (enable)
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+ /* Keep the SDIO mode bit if SDIO irqs are enabled */
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+ pm_runtime_get_sync(mmc_dev(mmc));
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+
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+ spin_lock_irqsave(&host->lock, flags);
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+ mmci_write_sdio_irq_bit(host, enable);
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+ spin_unlock_irqrestore(&host->lock, flags);
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+
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+ if (!enable) {
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+ pm_runtime_mark_last_busy(mmc_dev(mmc));
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+ pm_runtime_put_autosuspend(mmc_dev(mmc));
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+ }
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+}
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+
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+static void mmci_ack_sdio_irq(struct mmc_host *mmc)
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+{
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+ struct mmci_host *host = mmc_priv(mmc);
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&host->lock, flags);
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+ mmci_write_sdio_irq_bit(host, 1);
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+ spin_unlock_irqrestore(&host->lock, flags);
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+}
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+
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static struct mmc_host_ops mmci_ops = {
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.request = mmci_request,
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.pre_req = mmci_pre_request,
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@@ -2316,6 +2371,16 @@ static int mmci_probe(struct amba_device
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mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
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}
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+ if (variant->supports_sdio_irq && host->mmc->caps & MMC_CAP_SDIO_IRQ) {
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+ mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
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+
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+ mmci_ops.enable_sdio_irq = mmci_enable_sdio_irq;
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+ mmci_ops.ack_sdio_irq = mmci_ack_sdio_irq;
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+
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+ mmci_write_datactrlreg(host,
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+ host->variant->datactrl_mask_sdio);
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+ }
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+
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/* Variants with mandatory busy timeout in HW needs R1B responses. */
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if (variant->busy_timeout)
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mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
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--- a/drivers/mmc/host/mmci.h
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+++ b/drivers/mmc/host/mmci.h
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@@ -331,6 +331,7 @@ enum mmci_busy_state {
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* register.
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* @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register
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* @dma_lli: true if variant has dma link list feature.
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+ * @supports_sdio_irq: allow SD I/O card to interrupt the host
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* @stm32_idmabsize_mask: stm32 sdmmc idma buffer size.
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*/
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struct variant_data {
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@@ -376,6 +377,7 @@ struct variant_data {
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u32 start_err;
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u32 opendrain;
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u8 dma_lli:1;
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+ bool supports_sdio_irq;
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u32 stm32_idmabsize_mask;
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u32 stm32_idmabsize_align;
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void (*init)(struct mmci_host *host);
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