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4c54635106
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39341
332 lines
8.0 KiB
C
332 lines
8.0 KiB
C
/*
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* MikroTik RouterBOARD 2011 support
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*
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* Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
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* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) "rb2011: " fmt
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#include <linux/phy.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/routerboot.h>
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#include <linux/gpio.h>
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#include <asm/prom.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-m25p80.h"
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#include "dev-nfc.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "routerboot.h"
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#define RB2011_GPIO_NAND_NCE 14
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#define RB2011_GPIO_SFP_LOS 21
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#define RB_ROUTERBOOT_OFFSET 0x0000
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#define RB_ROUTERBOOT_MIN_SIZE 0xb000
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#define RB_HARD_CFG_SIZE 0x1000
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#define RB_BIOS_OFFSET 0xd000
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#define RB_BIOS_SIZE 0x1000
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#define RB_SOFT_CFG_OFFSET 0xf000
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#define RB_SOFT_CFG_SIZE 0x1000
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#define RB_ART_SIZE 0x10000
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#define RB2011_FLAG_SFP BIT(0)
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#define RB2011_FLAG_USB BIT(1)
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#define RB2011_FLAG_WLAN BIT(2)
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static struct mtd_partition rb2011_spi_partitions[] = {
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{
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.name = "routerboot",
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.offset = RB_ROUTERBOOT_OFFSET,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "hard_config",
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.size = RB_HARD_CFG_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bios",
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.offset = RB_BIOS_OFFSET,
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.size = RB_BIOS_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "soft_config",
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.size = RB_SOFT_CFG_SIZE,
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}
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};
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static void __init rb2011_init_partitions(const struct rb_info *info)
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{
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rb2011_spi_partitions[0].size = info->hard_cfg_offs;
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rb2011_spi_partitions[1].offset = info->hard_cfg_offs;
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rb2011_spi_partitions[3].offset = info->soft_cfg_offs;
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}
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static struct mtd_partition rb2011_nand_partitions[] = {
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{
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.name = "booter",
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.offset = 0,
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.size = (256 * 1024),
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "kernel",
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.offset = (256 * 1024),
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.size = (4 * 1024 * 1024) - (256 * 1024),
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct flash_platform_data rb2011_spi_flash_data = {
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.parts = rb2011_spi_partitions,
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.nr_parts = ARRAY_SIZE(rb2011_spi_partitions),
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};
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static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL3,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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};
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static struct ar8327_pad_cfg rb2011_ar8327_pad6_cfg;
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static struct ar8327_sgmii_cfg rb2011_ar8327_sgmii_cfg;
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static struct ar8327_led_cfg rb2011_ar8327_led_cfg = {
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.led_ctrl0 = 0xc731c731,
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.led_ctrl1 = 0x00000000,
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.led_ctrl2 = 0x00000000,
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.led_ctrl3 = 0x0030c300,
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.open_drain = false,
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};
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static const struct ar8327_led_info rb2011_ar8327_leds[] __initconst = {
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AR8327_LED_INFO(PHY0_0, HW, "rb:green:eth1"),
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AR8327_LED_INFO(PHY1_0, HW, "rb:green:eth2"),
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AR8327_LED_INFO(PHY2_0, HW, "rb:green:eth3"),
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AR8327_LED_INFO(PHY3_0, HW, "rb:green:eth4"),
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AR8327_LED_INFO(PHY4_0, HW, "rb:green:eth5"),
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AR8327_LED_INFO(PHY0_1, SW, "rb:green:eth6"),
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AR8327_LED_INFO(PHY1_1, SW, "rb:green:eth7"),
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AR8327_LED_INFO(PHY2_1, SW, "rb:green:eth8"),
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AR8327_LED_INFO(PHY3_1, SW, "rb:green:eth9"),
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AR8327_LED_INFO(PHY4_1, SW, "rb:green:eth10"),
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AR8327_LED_INFO(PHY4_2, SW, "rb:green:usr"),
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};
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static struct ar8327_platform_data rb2011_ar8327_data = {
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.pad0_cfg = &rb2011_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.led_cfg = &rb2011_ar8327_led_cfg,
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.num_leds = ARRAY_SIZE(rb2011_ar8327_leds),
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.leds = rb2011_ar8327_leds,
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};
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static struct mdio_board_info rb2011_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &rb2011_ar8327_data,
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},
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};
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static void __init rb2011_wlan_init(void)
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{
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char *art_buf;
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u8 wlan_mac[ETH_ALEN];
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art_buf = rb_get_wlan_data();
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if (art_buf == NULL)
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return;
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ath79_init_mac(wlan_mac, ath79_mac_base, 11);
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ath79_register_wmac(art_buf + 0x1000, wlan_mac);
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kfree(art_buf);
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}
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static void rb2011_nand_select_chip(int chip_no)
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{
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switch (chip_no) {
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case 0:
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gpio_set_value(RB2011_GPIO_NAND_NCE, 0);
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break;
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default:
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gpio_set_value(RB2011_GPIO_NAND_NCE, 1);
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break;
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}
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ndelay(500);
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}
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static struct nand_ecclayout rb2011_nand_ecclayout = {
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.eccbytes = 6,
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.eccpos = { 8, 9, 10, 13, 14, 15 },
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.oobavail = 9,
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.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
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};
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static int rb2011_nand_scan_fixup(struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd->priv;
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if (mtd->writesize == 512) {
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/*
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* Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
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* will not be able to find the kernel that we load.
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*/
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chip->ecc.layout = &rb2011_nand_ecclayout;
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}
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return 0;
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}
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static void __init rb2011_nand_init(void)
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{
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gpio_request_one(RB2011_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
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ath79_nfc_set_scan_fixup(rb2011_nand_scan_fixup);
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ath79_nfc_set_parts(rb2011_nand_partitions,
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ARRAY_SIZE(rb2011_nand_partitions));
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ath79_nfc_set_select_chip(rb2011_nand_select_chip);
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ath79_nfc_set_swap_dma(true);
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ath79_register_nfc();
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}
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static int rb2011_get_port_link(unsigned port)
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{
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if (port != 6)
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return -EINVAL;
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/* The Loss of signal line is active low */
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return !gpio_get_value(RB2011_GPIO_SFP_LOS);
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}
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static void __init rb2011_sfp_init(void)
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{
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gpio_request_one(RB2011_GPIO_SFP_LOS, GPIOF_IN, "SFP LOS");
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rb2011_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
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rb2011_ar8327_data.pad6_cfg = &rb2011_ar8327_pad6_cfg;
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rb2011_ar8327_sgmii_cfg.sgmii_ctrl = 0xc70167d0;
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rb2011_ar8327_sgmii_cfg.serdes_aen = true;
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rb2011_ar8327_data.sgmii_cfg = &rb2011_ar8327_sgmii_cfg;
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rb2011_ar8327_data.port6_cfg.force_link = 1;
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rb2011_ar8327_data.port6_cfg.speed = AR8327_PORT_SPEED_1000;
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rb2011_ar8327_data.port6_cfg.duplex = 1;
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rb2011_ar8327_data.get_port_link = rb2011_get_port_link;
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}
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static int __init rb2011_setup(u32 flags)
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{
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const struct rb_info *info;
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char buf[64];
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info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
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if (!info)
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return -ENODEV;
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scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
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(info->board_name) ? info->board_name : "");
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mips_set_machine_name(buf);
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rb2011_init_partitions(info);
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ath79_register_m25p80(&rb2011_spi_flash_data);
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rb2011_nand_init();
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
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AR934X_ETH_CFG_SW_ONLY_MODE);
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(rb2011_mdio0_info,
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ARRAY_SIZE(rb2011_mdio0_info));
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/* GMAC0 is connected to an ar8327 switch */
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ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_register_eth(0);
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/* GMAC1 is connected to the internal switch */
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ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_register_eth(1);
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if (flags & RB2011_FLAG_SFP)
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rb2011_sfp_init();
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if (flags & RB2011_FLAG_WLAN)
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rb2011_wlan_init();
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if (flags & RB2011_FLAG_USB)
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ath79_register_usb();
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return 0;
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}
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static void __init rb2011l_setup(void)
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{
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rb2011_setup(0);
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}
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011L, "2011L", rb2011l_setup);
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static void __init rb2011us_setup(void)
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{
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rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB);
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}
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011US, "2011US", rb2011us_setup);
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static void __init rb2011g_setup(void)
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{
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rb2011_setup(RB2011_FLAG_SFP |
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RB2011_FLAG_USB |
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RB2011_FLAG_WLAN);
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}
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011G, "2011G", rb2011g_setup);
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