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6ef6014887
Add pending patches to add RTL8231 support as a MDIO-bus attached multi-functional device. This includes subdrivers for the pincontrol and GPIO features, as well as the LED matrix support. Leave the drivers disabled until required by a device. Signed-off-by: Sander Vanheule <sander@svanheule.net>
57 lines
2.1 KiB
Diff
57 lines
2.1 KiB
Diff
From b3f79468c90d8770f007d628a1e32b2d5d44a5c2 Mon Sep 17 00:00:00 2001
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From: Sander Vanheule <sander@svanheule.net>
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Date: Sat, 15 May 2021 11:57:32 +0200
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Subject: [PATCH] gpio: regmap: Bypass cache for shadowed outputs
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Some chips have the read-only input and write-only output data registers
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aliased to the same offset, but do not perform direction multiplexing on
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writes. Upon writing the register, this then always updates the output
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value, even when the pin is configured as input. As a result it is not
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safe to perform read-modify-writes on output pins, when other pins are
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still configured as input.
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For example, on a bit-banged I2C bus, where the lines are switched
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between out-low and in (with external pull-up)
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OUT(L) IN OUT(H)
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SCK ....../''''''|''''''
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SDA '''''''''\..........
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^ ^- SCK switches to direction to OUT, but now has a high
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| value, breaking the clock.
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\- Perform RMW to update SDA. This reads the current input
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value for SCK, updates the SDA value and writes back a 1
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for SCK as well.
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If a register is used for both the data input and data output (and is
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not marked as volatile) the driver should ensure the cache is not
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updated on register reads. This ensures proper functioning of writing
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the output register with regmap_update_bits(), which will then use and
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update the cache only on register writes.
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Signed-off-by: Sander Vanheule <sander@svanheule.net>
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---
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drivers/gpio/gpio-regmap.c | 10 +++++++++-
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1 file changed, 9 insertions(+), 1 deletion(-)
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--- a/drivers/gpio/gpio-regmap.c
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+++ b/drivers/gpio/gpio-regmap.c
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@@ -74,7 +74,15 @@ static int gpio_regmap_get(struct gpio_c
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if (ret)
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return ret;
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- ret = regmap_read(gpio->regmap, reg, &val);
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+ /*
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+ * Ensure we don't spoil the register cache with pin input values and
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+ * perform a bypassed read. This way the cache (if any) is only used and
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+ * updated on register writes.
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+ */
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+ if (gpio->reg_dat_base == gpio->reg_set_base)
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+ ret = regmap_read_bypassed(gpio->regmap, reg, &val);
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+ else
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+ ret = regmap_read(gpio->regmap, reg, &val);
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if (ret)
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return ret;
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