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670dedbbd7
Backport cpufreq changes from upstream so that the MediaTek MT7988 SoC
can be supported.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit e4555d69a1)
118 lines
3.6 KiB
Diff
118 lines
3.6 KiB
Diff
From 342d5545e9f40496db9ae0d31c2427dd5f369a43 Mon Sep 17 00:00:00 2001
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From: Jia-Wei Chang <jia-wei.chang@mediatek.com>
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Date: Fri, 8 Apr 2022 12:58:58 +0800
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Subject: [PATCH 03/21] cpufreq: mediatek: Enable clocks and regulators
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We need to enable regulators so that the max and min requested values will
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be recorded.
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The intermediate clock is not always enabled by CCF in different projects,
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so we should enable it in the cpufreq driver.
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Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
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Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
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Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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drivers/cpufreq/mediatek-cpufreq.c | 50 +++++++++++++++++++++++++++---
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1 file changed, 45 insertions(+), 5 deletions(-)
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--- a/drivers/cpufreq/mediatek-cpufreq.c
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+++ b/drivers/cpufreq/mediatek-cpufreq.c
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@@ -334,10 +334,23 @@ static int mtk_cpu_dvfs_info_init(struct
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goto out_free_resources;
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}
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+ ret = regulator_enable(info->proc_reg);
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+ if (ret) {
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+ dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu);
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+ goto out_free_resources;
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+ }
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+
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/* Both presence and absence of sram regulator are valid cases. */
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info->sram_reg = regulator_get_exclusive(cpu_dev, "sram");
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if (IS_ERR(info->sram_reg))
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info->sram_reg = NULL;
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+ else {
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+ ret = regulator_enable(info->sram_reg);
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+ if (ret) {
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+ dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu);
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+ goto out_free_resources;
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+ }
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+ }
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/* Get OPP-sharing information from "operating-points-v2" bindings */
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ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
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@@ -353,13 +366,21 @@ static int mtk_cpu_dvfs_info_init(struct
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goto out_free_resources;
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}
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+ ret = clk_prepare_enable(info->cpu_clk);
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+ if (ret)
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+ goto out_free_opp_table;
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+
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+ ret = clk_prepare_enable(info->inter_clk);
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+ if (ret)
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+ goto out_disable_mux_clock;
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+
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/* Search a safe voltage for intermediate frequency. */
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rate = clk_get_rate(info->inter_clk);
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
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if (IS_ERR(opp)) {
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dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu);
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ret = PTR_ERR(opp);
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- goto out_free_opp_table;
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+ goto out_disable_inter_clock;
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}
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info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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@@ -372,10 +393,21 @@ static int mtk_cpu_dvfs_info_init(struct
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return 0;
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+out_disable_inter_clock:
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+ clk_disable_unprepare(info->inter_clk);
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+
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+out_disable_mux_clock:
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+ clk_disable_unprepare(info->cpu_clk);
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+
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out_free_opp_table:
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dev_pm_opp_of_cpumask_remove_table(&info->cpus);
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out_free_resources:
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+ if (regulator_is_enabled(info->proc_reg))
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+ regulator_disable(info->proc_reg);
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+ if (info->sram_reg && regulator_is_enabled(info->sram_reg))
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+ regulator_disable(info->sram_reg);
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+
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if (!IS_ERR(info->proc_reg))
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regulator_put(info->proc_reg);
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if (!IS_ERR(info->sram_reg))
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@@ -390,14 +422,22 @@ out_free_resources:
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static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
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{
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- if (!IS_ERR(info->proc_reg))
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+ if (!IS_ERR(info->proc_reg)) {
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+ regulator_disable(info->proc_reg);
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regulator_put(info->proc_reg);
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- if (!IS_ERR(info->sram_reg))
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+ }
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+ if (!IS_ERR(info->sram_reg)) {
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+ regulator_disable(info->sram_reg);
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regulator_put(info->sram_reg);
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- if (!IS_ERR(info->cpu_clk))
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+ }
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+ if (!IS_ERR(info->cpu_clk)) {
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+ clk_disable_unprepare(info->cpu_clk);
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clk_put(info->cpu_clk);
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- if (!IS_ERR(info->inter_clk))
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+ }
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+ if (!IS_ERR(info->inter_clk)) {
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+ clk_disable_unprepare(info->inter_clk);
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clk_put(info->inter_clk);
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+ }
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dev_pm_opp_of_cpumask_remove_table(&info->cpus);
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}
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