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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
87 lines
2.8 KiB
Diff
87 lines
2.8 KiB
Diff
From 98d529ffea66937e8a9ba8b69172bb9c599cfa39 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 7 Feb 2020 16:04:16 +0100
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Subject: [PATCH] clk: bcm: rpi: Add clock id to data
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The driver has really only supported one clock so far and has hardcoded the
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ID used in communications with the firmware in all the functions
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implementing the clock framework hooks. Let's store that in the clock data
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structure so that we can support more clocks later on.
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Cc: Michael Turquette <mturquette@baylibre.com>
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Cc: linux-clk@vger.kernel.org
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Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Reviewed-by: Stephen Boyd <sboyd@kernel.org>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/clk/bcm/clk-raspberrypi.c | 16 +++++++---------
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1 file changed, 7 insertions(+), 9 deletions(-)
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--- a/drivers/clk/bcm/clk-raspberrypi.c
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+++ b/drivers/clk/bcm/clk-raspberrypi.c
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@@ -39,6 +39,7 @@ struct raspberrypi_clk {
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struct raspberrypi_clk_data {
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struct clk_hw hw;
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+ unsigned id;
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unsigned long min_rate;
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unsigned long max_rate;
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@@ -95,7 +96,7 @@ static int raspberrypi_fw_pll_is_on(stru
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ret = raspberrypi_clock_property(rpi->firmware,
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RPI_FIRMWARE_GET_CLOCK_STATE,
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- RPI_FIRMWARE_ARM_CLK_ID, &val);
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+ data->id, &val);
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if (ret)
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return 0;
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@@ -114,8 +115,7 @@ static unsigned long raspberrypi_fw_pll_
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ret = raspberrypi_clock_property(rpi->firmware,
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RPI_FIRMWARE_GET_CLOCK_RATE,
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- RPI_FIRMWARE_ARM_CLK_ID,
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- &val);
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+ data->id, &val);
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if (ret)
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return ret;
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@@ -133,8 +133,7 @@ static int raspberrypi_fw_pll_set_rate(s
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ret = raspberrypi_clock_property(rpi->firmware,
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RPI_FIRMWARE_SET_CLOCK_RATE,
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- RPI_FIRMWARE_ARM_CLK_ID,
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- &new_rate);
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+ data->id, &new_rate);
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if (ret)
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dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d",
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clk_hw_get_name(hw), ret);
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@@ -189,6 +188,7 @@ static int raspberrypi_register_pllb(str
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if (!data)
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return -ENOMEM;
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data->rpi = rpi;
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+ data->id = RPI_FIRMWARE_ARM_CLK_ID;
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/* All of the PLLs derive from the external oscillator. */
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init.parent_names = (const char *[]){ "osc" };
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@@ -200,8 +200,7 @@ static int raspberrypi_register_pllb(str
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/* Get min & max rates set by the firmware */
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ret = raspberrypi_clock_property(rpi->firmware,
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RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
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- RPI_FIRMWARE_ARM_CLK_ID,
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- &min_rate);
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+ data->id, &min_rate);
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if (ret) {
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dev_err(rpi->dev, "Failed to get %s min freq: %d\n",
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init.name, ret);
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@@ -210,8 +209,7 @@ static int raspberrypi_register_pllb(str
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ret = raspberrypi_clock_property(rpi->firmware,
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RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
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- RPI_FIRMWARE_ARM_CLK_ID,
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- &max_rate);
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+ data->id, &max_rate);
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if (ret) {
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dev_err(rpi->dev, "Failed to get %s max freq: %d\n",
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init.name, ret);
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