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50958f5e03
The dcache bug that it works around is a generic issue, not a brcm47xx cache quirk SVN-Revision: 32395
33 lines
924 B
Diff
33 lines
924 B
Diff
--- a/arch/mips/mm/cache.c
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+++ b/arch/mips/mm/cache.c
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@@ -39,6 +39,7 @@ void (*__flush_kernel_vmap_range)(unsign
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void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
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EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
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+EXPORT_SYMBOL(__flush_cache_all);
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/* MIPS specific cache operations */
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void (*flush_cache_sigtramp)(unsigned long addr);
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--- a/fs/fuse/dev.c
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+++ b/fs/fuse/dev.c
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@@ -19,6 +19,9 @@
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#include <linux/pipe_fs_i.h>
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#include <linux/swap.h>
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#include <linux/splice.h>
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+#ifdef CONFIG_MIPS
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+#include <asm/cacheflush.h>
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+#endif
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MODULE_ALIAS_MISCDEV(FUSE_MINOR);
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MODULE_ALIAS("devname:fuse");
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@@ -655,6 +658,9 @@ static int fuse_copy_fill(struct fuse_co
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static int fuse_copy_do(struct fuse_copy_state *cs, void **val, unsigned *size)
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{
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unsigned ncpy = min(*size, cs->len);
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+#ifdef CONFIG_MIPS
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+ __flush_cache_all();
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+#endif
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if (val) {
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if (cs->write)
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memcpy(cs->buf, *val, ncpy);
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