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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
110 lines
3.4 KiB
Diff
110 lines
3.4 KiB
Diff
From dbc9e83cefe51d19877a4a7349ebbeafa31c0e06 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Fri, 16 Jul 2021 21:33:16 -0500
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Subject: [PATCH 075/117] spi: spi-sun6i: Use a struct for quirks
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/spi/spi-sun6i.c | 32 ++++++++++++++++++++++----------
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1 file changed, 22 insertions(+), 10 deletions(-)
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--- a/drivers/spi/spi-sun6i.c
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+++ b/drivers/spi/spi-sun6i.c
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@@ -85,7 +85,12 @@
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#define SUN6I_TXDATA_REG 0x200
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#define SUN6I_RXDATA_REG 0x300
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+struct sun6i_spi_quirks {
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+ unsigned long fifo_depth;
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+};
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+
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struct sun6i_spi {
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+ const struct sun6i_spi_quirks *quirks;
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struct spi_master *master;
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void __iomem *base_addr;
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dma_addr_t dma_addr_rx;
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@@ -100,7 +105,6 @@ struct sun6i_spi {
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const u8 *tx_buf;
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u8 *rx_buf;
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int len;
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- unsigned long fifo_depth;
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};
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static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
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@@ -157,7 +161,7 @@ static inline void sun6i_spi_fill_fifo(s
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u8 byte;
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/* See how much data we can fit */
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- cnt = sspi->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi);
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+ cnt = sspi->quirks->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi);
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len = min((int)cnt, sspi->len);
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@@ -300,14 +304,14 @@ static int sun6i_spi_transfer_one(struct
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* the hardcoded value used in old generation of Allwinner
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* SPI controller. (See spi-sun4i.c)
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*/
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- trig_level = sspi->fifo_depth / 4 * 3;
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+ trig_level = sspi->quirks->fifo_depth / 4 * 3;
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} else {
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/*
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* Setup FIFO DMA request trigger level
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* We choose 1/2 of the full fifo depth, that value will
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* be used as DMA burst length.
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*/
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- trig_level = sspi->fifo_depth / 2;
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+ trig_level = sspi->quirks->fifo_depth / 2;
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if (tfr->tx_buf)
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reg |= SUN6I_FIFO_CTL_TF_DRQ_EN;
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@@ -421,9 +425,9 @@ static int sun6i_spi_transfer_one(struct
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reg = SUN6I_INT_CTL_TC;
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if (!use_dma) {
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- if (rx_len > sspi->fifo_depth)
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+ if (rx_len > sspi->quirks->fifo_depth)
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reg |= SUN6I_INT_CTL_RF_RDY;
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- if (tx_len > sspi->fifo_depth)
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+ if (tx_len > sspi->quirks->fifo_depth)
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reg |= SUN6I_INT_CTL_TF_ERQ;
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}
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@@ -569,7 +573,7 @@ static bool sun6i_spi_can_dma(struct spi
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* the fifo length we can just fill the fifo and wait for a single
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* irq, so don't bother setting up dma
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*/
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- return xfer->len > sspi->fifo_depth;
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+ return xfer->len > sspi->quirks->fifo_depth;
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}
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static int sun6i_spi_probe(struct platform_device *pdev)
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@@ -608,7 +612,7 @@ static int sun6i_spi_probe(struct platfo
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}
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sspi->master = master;
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- sspi->fifo_depth = (unsigned long)of_device_get_match_data(&pdev->dev);
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+ sspi->quirks = of_device_get_match_data(&pdev->dev);
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master->max_speed_hz = 100 * 1000 * 1000;
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master->min_speed_hz = 3 * 1000;
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@@ -723,9 +727,17 @@ static int sun6i_spi_remove(struct platf
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return 0;
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}
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+static const struct sun6i_spi_quirks sun6i_a31_spi_quirks = {
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+ .fifo_depth = SUN6I_FIFO_DEPTH,
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+};
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+
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+static const struct sun6i_spi_quirks sun8i_h3_spi_quirks = {
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+ .fifo_depth = SUN8I_FIFO_DEPTH,
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+};
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+
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static const struct of_device_id sun6i_spi_match[] = {
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- { .compatible = "allwinner,sun6i-a31-spi", .data = (void *)SUN6I_FIFO_DEPTH },
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- { .compatible = "allwinner,sun8i-h3-spi", .data = (void *)SUN8I_FIFO_DEPTH },
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+ { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_quirks },
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+ { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_quirks },
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{}
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};
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MODULE_DEVICE_TABLE(of, sun6i_spi_match);
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