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7eda44f536
Add u-boot support based on the kernel dts introduced ind1016446and the GL-MT6000 u-boot support infe10f974. The pcie-mediatek-gen3 kernel driver doesn't like hotplug, so to work in PCIe mode, the 5G modem on this device needs to be switched on by u-boot before starting the kernel. Include an init_modem step in the boot_system action to set the relevant gpios. (The factory bootloader does the same, using Mediatek SDK-specific gpio_power_clr and gpio_pull_up.) Ideally the modem would be started using gpio-hog in the device tree, but this will need to wait until mediatek gpio-hog support is fixed upstream: https://lore.kernel.org/u-boot/6ef2583e85eea60560d7776377d662779e7c44e5.1722419839.git.chris@arachsys.com/ The bootloader can be replaced using the built-in web interface of the factory bootloader. Hold the reset button for five seconds while powering on the device and it will boot into a recovery http server. http://192.168.1.1/uboot.html and http://192.168.1.1/bl2.html can then be used to upload openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip and openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin respectively. Alternatively, from a root shell on the running system, unlock the boot partition with echo 0 >/sys/block/mmcblk0boot0/force_ro then write openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip to /dev/mmcblk0p4 and openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin to /dev/mmcblk0boot0. Signed-off-by: Chris Webb <chris@arachsys.com> Link: https://github.com/openwrt/openwrt/pull/15645 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
289 lines
7.8 KiB
Diff
289 lines
7.8 KiB
Diff
diff --git a/arch/arm/dts/mt7981-glinet-gl-x3000.dts b/arch/arm/dts/mt7981-glinet-gl-x3000.dts
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new file mode 100644
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index 0000000..911a702
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--- /dev/null
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+++ b/arch/arm/dts/mt7981-glinet-gl-x3000.dts
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@@ -0,0 +1,144 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+/dts-v1/;
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+#include "mt7981.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/linux-event-codes.h>
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ model = "GL.iNet GL-X3000";
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+ compatible = "glinet,gl-x3000", "mediatek,mt7981";
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+
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+ chosen {
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+ stdout-path = &uart0;
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+ tick-timer = &timer0;
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+ };
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+
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+ memory@40000000 {
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+ device_type = "memory";
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+ reg = <0x40000000 0x20000000>;
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+ };
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+
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+ reg_3p3v: regulator-3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ wifi2g {
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+ label = "green:wifi2g";
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+ gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wifi5g {
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+ label = "green:wifi5g";
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+ gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ 5g_led1 {
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+ label = "green:5g:led1";
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+ gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ 5g_led2 {
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+ label = "green:5g:led2";
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+ gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ 5g_led3 {
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+ label = "green:5g:led3";
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+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ 5g_led4 {
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+ label = "green:5g:led4";
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+ gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ power {
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+ label = "green:power";
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+ gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wan {
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+ label = "green:wan";
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+ gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+ð {
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+ status = "okay";
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+ mediatek,gmac-id = <1>;
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+ phy-mode = "gmii";
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+ phy-handle = <&phy0>;
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+
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+ mdio {
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+ phy0: ethernet-phy@0 {
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+ compatible = "ethernet-phy-id03a2.9461";
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+ reg = <0x0>;
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+ phy-mode = "gmii";
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+ };
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+ };
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ max-frequency = <52000000>;
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+ bus-width = <8>;
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+ cap-mmc-hw-highspeed;
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+ cap-mmc-hw-reset;
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+ vmmc-supply = <®_3p3v>;
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+ non-removable;
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ mmc0_pins_default: mmc0-pins-default {
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+ mux {
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+ function = "flash";
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+ groups = "emmc_45";
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+ };
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+ conf-cmd-dat {
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+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
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+ "SPI0_CS", "SPI0_HOLD", "SPI0_WP",
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+ "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
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+ input-enable;
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+ drive-strength = <MTK_DRIVE_4mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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+ };
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+ conf-clk {
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+ pins = "SPI1_CS";
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+ drive-strength = <MTK_DRIVE_6mA>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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+ };
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+ conf-rst {
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+ pins = "GPIO_WPS";
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+ drive-strength = <MTK_DRIVE_4mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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+ };
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+ };
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+};
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+
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+&uart0 {
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+ status = "okay";
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+};
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diff --git a/configs/mt7981_glinet_gl-x3000_defconfig b/configs/mt7981_glinet_gl-x3000_defconfig
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new file mode 100644
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index 0000000..96ad96f
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--- /dev/null
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+++ b/configs/mt7981_glinet_gl-x3000_defconfig
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@@ -0,0 +1,100 @@
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+CONFIG_ARM=y
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+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
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+CONFIG_POSITION_INDEPENDENT=y
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+CONFIG_ARCH_MEDIATEK=y
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+CONFIG_TEXT_BASE=0x41e00000
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+CONFIG_SYS_MALLOC_F_LEN=0x4000
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_ENV_SIZE=0x80000
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+CONFIG_ENV_OFFSET=0x400000
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+CONFIG_DEFAULT_DEVICE_TREE="mt7981-glinet-gl-x3000"
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+CONFIG_OF_LIBFDT_OVERLAY=y
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+CONFIG_TARGET_MT7981=y
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+CONFIG_DEBUG_UART_BASE=0x11002000
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+CONFIG_DEBUG_UART_CLOCK=40000000
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+CONFIG_SYS_LOAD_ADDR=0x46000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_ENV_VARS_UBOOT_CONFIG=y
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+# CONFIG_EXPERT is not set
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+CONFIG_FIT=y
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+# CONFIG_BOOTSTD is not set
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+# CONFIG_LEGACY_IMAGE_FORMAT is not set
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+CONFIG_AUTOBOOT_MENU_SHOW=y
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+CONFIG_USE_BOOTCOMMAND=y
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+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-glinet-gl-x3000.dtb"
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+CONFIG_LOGLEVEL=7
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+CONFIG_BOARD_LATE_INIT=y
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+CONFIG_HUSH_PARSER=y
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+CONFIG_SYS_PROMPT="MT7981> "
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+CONFIG_SYS_CBSIZE=512
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+CONFIG_SYS_PBSIZE=1049
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+CONFIG_CMD_CPU=y
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+CONFIG_CMD_LICENSE=y
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+# CONFIG_BOOTM_NETBSD is not set
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+# CONFIG_BOOTM_PLAN9 is not set
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+# CONFIG_BOOTM_RTEMS is not set
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+# CONFIG_BOOTM_VXWORKS is not set
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+CONFIG_CMD_BOOTMENU=y
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+# CONFIG_CMD_ELF is not set
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+CONFIG_CMD_ASKENV=y
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+CONFIG_CMD_ERASEENV=y
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+CONFIG_CMD_ENV_FLAGS=y
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+CONFIG_CMD_STRINGS=y
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+# CONFIG_CMD_UNLZ4 is not set
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+# CONFIG_CMD_UNZIP is not set
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+CONFIG_CMD_DM=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_GPT_RENAME=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PART=y
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+CONFIG_CMD_READ=y
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+CONFIG_CMD_WRITE=y
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+CONFIG_CMD_DHCP=y
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+CONFIG_CMD_TFTPSRV=y
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+CONFIG_CMD_RARP=y
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+CONFIG_CMD_PING=y
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+CONFIG_CMD_CDP=y
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+CONFIG_CMD_SNTP=y
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+CONFIG_CMD_DNS=y
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+CONFIG_CMD_LINK_LOCAL=y
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+CONFIG_CMD_PXE=y
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+CONFIG_CMD_CACHE=y
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+CONFIG_CMD_PSTORE=y
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+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
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+CONFIG_CMD_UUID=y
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+CONFIG_CMD_HASH=y
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+CONFIG_CMD_SMC=y
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+CONFIG_PARTITION_TYPE_GUID=y
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+CONFIG_ENV_OVERWRITE=y
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_USE_DEFAULT_ENV_FILE=y
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+CONFIG_DEFAULT_ENV_FILE="glinet_gl-x3000_env"
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+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_REGMAP=y
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+CONFIG_SYSCON=y
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+CONFIG_BUTTON=y
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+CONFIG_BUTTON_GPIO=y
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+CONFIG_CLK=y
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+CONFIG_GPIO_HOG=y
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+CONFIG_LED=y
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+CONFIG_LED_BLINK=y
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+CONFIG_LED_GPIO=y
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+CONFIG_MMC_HS200_SUPPORT=y
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+CONFIG_MMC_MTK=y
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+CONFIG_PHY_FIXED=y
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+CONFIG_MEDIATEK_ETH=y
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+CONFIG_PINCTRL=y
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+CONFIG_PINCONF=y
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+CONFIG_PINCTRL_MT7981=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_MTK_POWER_DOMAIN=y
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+CONFIG_DM_REGULATOR=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_SERIAL=y
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+CONFIG_MTK_SERIAL=y
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+CONFIG_HEXDUMP=y
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+# CONFIG_EFI_LOADER is not set
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+CONFIG_LMB_MAX_REGIONS=64
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+# CONFIG_TOOLS_LIBCRYPTO is not set
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diff --git a/glinet_gl-x3000_env b/glinet_gl-x3000_env
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new file mode 100644
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index 0000000..e624e41
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--- /dev/null
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+++ b/glinet_gl-x3000_env
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@@ -0,0 +1,26 @@
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+ipaddr=192.168.1.1
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+serverip=192.168.1.254
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+loadaddr=0x46000000
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+bootdelay=3
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+bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin
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+bootfile_fip=openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip
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+bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-x3000-squashfs-factory.bin
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+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
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+bootmenu_title= *** U-Boot Boot Menu for GL-iNet GL-X3000 ***
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+bootmenu_0=Startup system (Default).=run boot_system
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+bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return
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+bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return
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+bootmenu_3=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
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+bootmenu_4=Reboot.=reset
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+bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset
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+filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200
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+mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size
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+boot_system=run init_modem && part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm
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+boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware
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+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
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+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
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+emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt
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+emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0
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+emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt
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+init_modem=gpio set 10; gpio set 5; gpio set 9; gpio set 11; sleep 0.1; gpio clear 10; sleep 1
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+reset_factory=eraseenv && reset
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