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4eda3e8b9a
Copy patches and config from kernel 5.15 to start preparing kernel 6.1 support. Signed-off-by: Robert Marko <robimarko@gmail.com>
37 lines
1.3 KiB
Diff
37 lines
1.3 KiB
Diff
From 0171978734227bdd7813bc6d805f609126e3849e Mon Sep 17 00:00:00 2001
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From: Johan Hovold <johan+linaro@kernel.org>
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Date: Tue, 5 Jul 2022 13:40:22 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq8074: drop USB PHY clock index
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The QMP USB PHY provides a single clock so drop the redundant clock
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index.
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Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220705114032.22787-5-johan+linaro@kernel.org
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -130,7 +130,7 @@
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<0x00058800 0x1f8>, /* PCS */
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<0x00058600 0x044>; /* PCS misc*/
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#phy-cells = <0>;
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- #clock-cells = <1>;
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+ #clock-cells = <0>;
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clocks = <&gcc GCC_USB1_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "usb3phy_1_cc_pipe_clk";
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@@ -173,7 +173,7 @@
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<0x00078800 0x1f8>, /* PCS */
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<0x00078600 0x044>; /* PCS misc*/
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#phy-cells = <0>;
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- #clock-cells = <1>;
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+ #clock-cells = <0>;
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clocks = <&gcc GCC_USB0_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "usb3phy_0_cc_pipe_clk";
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