mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 08:51:13 +00:00
4eda3e8b9a
Copy patches and config from kernel 5.15 to start preparing kernel 6.1 support. Signed-off-by: Robert Marko <robimarko@gmail.com>
37 lines
1.1 KiB
Diff
37 lines
1.1 KiB
Diff
From a505f23abf0c31f40a2c3070d82e961b7c045664 Mon Sep 17 00:00:00 2001
|
|
From: Kathiravan T <quic_kathirav@quicinc.com>
|
|
Date: Tue, 8 Feb 2022 21:05:24 +0530
|
|
Subject: [PATCH] arm64: dts: qcom: ipq8074: enable the GICv2m support
|
|
|
|
GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
|
|
which supports upto 32 MSI interrupts. Lets add support for the same.
|
|
|
|
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
|
|
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
|
|
---
|
|
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 9 +++++++++
|
|
1 file changed, 9 insertions(+)
|
|
|
|
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
|
|
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
|
|
@@ -635,9 +635,18 @@
|
|
|
|
intc: interrupt-controller@b000000 {
|
|
compatible = "qcom,msm-qgic2";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x3>;
|
|
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
|
|
+ ranges = <0 0xb00a000 0xffd>;
|
|
+
|
|
+ v2m@0 {
|
|
+ compatible = "arm,gic-v2m-frame";
|
|
+ msi-controller;
|
|
+ reg = <0x0 0xffd>;
|
|
+ };
|
|
};
|
|
|
|
timer {
|