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9aa196e0f2
Refresh patches, following required reworking: ar71xx/patches-4.9/930-chipidea-pullup.patch layerscape/patches-4.9/302-dts-support-layercape.patch sunxi/patches-4.9/0052-stmmac-form-4-12.patch Fixes for CVEs: CVE-2018-1108 CVE-2018-1092 Tested on: ar71xx Archer C7 v2 Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Tested-by: Arjen de Korte <build+openwrt@de-korte.org>
38 lines
1.3 KiB
Diff
38 lines
1.3 KiB
Diff
From 599e7165ec6477139dae4f32a12e8d49d5dd8859 Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Mon, 9 May 2016 17:28:18 -0700
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Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
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These divide off of PLLD_PER and are used for the ethernet and wifi
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PHYs source PLLs. Neither of them is currently represented by a phy
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device that would grab the clock for us.
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This keeps other drivers from killing the networking PHYs when they
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disable their own clocks and trigger PLLD_PER's refcount going to 0.
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v2: Skip marking as critical if they aren't on at boot.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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---
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drivers/clk/bcm/clk-bcm2835.c | 9 +++++++++
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1 file changed, 9 insertions(+)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1268,6 +1268,15 @@ static struct clk_hw *bcm2835_register_c
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init.name = data->name;
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init.flags = data->flags | CLK_IGNORE_UNUSED;
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+ /*
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+ * Some GPIO clocks for ethernet/wifi PLLs are marked as
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+ * critical (since some platforms use them), but if the
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+ * firmware didn't have them turned on then they clearly
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+ * aren't actually critical.
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+ */
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+ if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
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+ init.flags &= ~CLK_IS_CRITICAL;
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+
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if (data->is_vpu_clock) {
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init.ops = &bcm2835_vpu_clock_clk_ops;
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} else {
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